The invention relates to the field of electrical automation, and discloses a real-time acquisition system with high anti-interference performance and an acquisition method thereof. The system comprises a PCI board card, a host, and a real-time acquisition control board. The PCI board card is clamped on the host. The PCI board card is connected with the real-time acquisition control board. The datainteraction between the host and the real-time acquisition control board is realized through the MATLAB/Simulink software. The system is high in anti-interference performance, high in precision and multifunctional. Meanwhile, the real-time acquisition control board card has the signal isolation function. The board card comprises the functions of AD/DA conversion, PWM (pulse width modulation) output, QEP orthogonal c ding circuit, CAP capturing unit, digital quantity I/O (input/output) and the like, and can meet the requirements on the hardware resources of the board card in multiple fields and multiple occasions. Therefore, the good applicability is achieved.

Real-time acquisition system with high anti-interference performance and acquisition method thereof

The invention provides a communication method of a CPU and a digital logic module in a PLC system based on SOC FPGA and relates to the communication technology field. According to the method, the FPGAdigital logic is set to be a processor bus secondary device, control registers and data storage areas are constructed in the bus secondary device, the control registers and the data storage areas areread and written through a data bus by the CPU according to the specific sequence to achieve reliable communication with the FPGA logic, and control of a PLC IO device is then completed.

Communication method of CPU and digital logic module in PLC system based on SOC FPGA

The invention discloses a system and a method for controlling serialization of multiple types of data blocks by an FPGA (field programmable gate array). The system comprises an FPGA data processing module and a PC; the system also comprises a plurality of front end data modules and a PCIE control module; the front end data modules are used for acquiring front end data signals from a GPS satellite,converting radio frequency signals in the front end data signals into digital signals and outputting the digital front end data signals to the FPGA data processing module; and the FPGA data processing module and the PC carry out data transmission through the PCIE control module. The method uses the above described serialization control system to implement serialization control. The system and themethod for controlling serialization of multiple types of data blocks by the FPGA output the control state by adopting a universal serialization control mode so as to meet the acquisition of data blocks with various sizes.

System and method for controlling serialization of multiple types of data blocks by FPGA

The invention relates to the technical field of interface communication, in particular to a communication system and a communication method for POWERPC (Performance Optimization With Enhanced RISC (Reduced Instruction Set Computer)-Performance Computing) and an FPGA (Field-Programmable Gate Array). The system structurally comprises a PowerPC chip and an FPGA chip, wherein the PowerPC chip and theFPGA chip are connected with two GPIOs (General Purpose Input/Output) through a Local Bus; the Local Bus and the GPIOs are connected to control logic in the FPGA chip; the Local Bus is connected to aLocal Bus control module in the FPGA chip; the GPIOs are taken as a handshaking signal to be connected to a read-write control module in the FPGA chip; and the two GPIOs are under a high level by default. The communication system and the communication method for the POWERPC and the FPGA have the characteristic of being simple in implementation, and the data communication of the POWERPC and the FPGA is guaranteed.

Communication system and communication method for POWERPC (Performance Optimization With Enhanced RISC (Reduced Instruction Set Computer)-Performance Computing) and FPGA (Field-Programmable Gate Array)

The invention discloses a communication method between an FPGA and a PC on the basis of a PowerPC and a network port. By means of the method, PowerPC control is not needed in the data transmission process, and an external module is used for controlling. When data is written into an RAM, the external module notifies the PowerPC to process the data through triggered interruption; when the PowerPC needs to transmit the data to a function module, a rising edge is provided for the function module through a GPIO port, and the function module is informed of reading the data. By means of the method, the time expenditure in the data receiving, storing and sending processes is greatly reduced for the PowerPC, and the possibility of communication collapse can be effectively reduced on occasions withhigh instantaneity requirements.

Communication method between FPGA and PC on basis of PowerPC and network port

The invention discloses a high-speed data collection and storage system based on an FPGA and PCIe. The system includes an AD collection module, a signal preprocessing module, a dual-port RAM, a PCIe data transmission module, a solid-state disk array, a self-checking module, a power supply module, a serial-port control module and a clock module. The AD collection module is used for collecting signal data. The signal preprocessing module preprocesses the data collected by AD. The PCIe data transmission module is used for storing the data, which are already processed by the FPGA, to the solid-state disk array. The self-checking module is used for carrying out fast Fourier transform on the data stored to the solid-state disk array, and judging whether system working is normal. According to thesystem, the data can be collected at an ultra-high sampling rate of up to 3.6 GHz, bit cutting, selective storage and addition of data identifiers are completed through preprocessing the data, and real-time data transmission is realized.

High-speed data collection and storage system based on FPGA and PCIe

The invention discloses a large-capacity high-speed data transmission and storage system and method based on PCIE3.0. The system includes an FPGA board, a DDR3, an upper computer data receiving/emitting module, a power supply module, a clock module, a real-time capacity detection module, a solid-state disk array module, a waveform display module and a self-test data verification module. The FPGA board includes a self-test data generation module and a board data emitting/receiving module. By means of the large-capacity high-speed data transmission and storage system and method based on the PCIE3.0, the data transmission speed and the high-speed data storage capacity are increased, the working performance of the system can be judged, and the data storage location is selected.

Cao Xinquan

Papers

Communication method between FPGA and PC on basis of PowerPC and network port

High-speed data collection and storage system based on FPGA and PCIe

Large-capacity high-speed data transmission and storage system and method based on PCIE3.0