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Carole Dulong

Researcher at Intel

Publications -  75
Citations -  2308

Carole Dulong is an academic researcher from Intel. The author has contributed to research in topics: Processor register & Memory data register. The author has an hindex of 29, co-authored 75 publications receiving 2298 citations.

Papers
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Patent

Method and apparatus for performing multiply-add operations on packed data

TL;DR: In this article, a method and apparatus for including in a processor instructions for performing multiply-add operations on packed data is described. But it is not shown how to include such instructions in the instructions themselves.
Patent

Method for personalized named entity recognition

TL;DR: In this article, personalized named entity recognition may be accomplished by parsing input text to determine a subset of the input text, generating a plurality of queries based at least in part on the subset of input text and submitting the queries to a pluralityof reference resources, processing responses to the queries and generating a vector based on the responses, and performing classification based on a vector and a set of model parameters.
Patent

Method and apparatus for executing two types of instructions that specify registers of a shared logical register file in a stack and a non-stack referenced manner

TL;DR: In this paper, a method and apparatus for executing floating point and packed data instructions using a single physical register file that is aliased is described, where a processor is provided that includes a decode unit, a mapping unit and a storage unit.
Proceedings ArticleDOI

Detecting phases in parallel applications on shared memory architectures

TL;DR: This paper examines applying phase analysis algorithms and how to adapt them to parallel applications running on shared memory processors, and examines using the phase analysis to pick simulation points to guide multithreaded simulation.
Patent

Memory transfer apparatus and method useful within a pattern recognition system

TL;DR: Memory to memory transfer as mentioned in this paper allows memory transfer operations to occur in parallel with the operation of arithmetic pipelines that process pattern recognition procedures, so that no additional processing time is consumed by a memory transfer.