This paper addresses the low-temperature deposition processes and electronic properties of silicon based thin film semiconductors and dielectrics to enable the fabrication of mechanically flexible electronic devices on plastic substrates. Device quality amorphous hydrogenated silicon (a-Si:H), nanocrystalline silicon (nc-Si), and amorphous silicon nitride (a-SiN/sub x/) films and thin film transistors (TFTs) were made using existing industrial plasma deposition equipment at the process temperatures as low as 75/spl deg/C and 120/spl deg/C. The a-Si:H TFTs fabricated at 120/spl deg/C demonstrate performance similar to their high-temperature counterparts, including the field effect mobility (/spl mu//sub FE/) of 0.8 cm/sup 2/V/sup -1/s/sup -1/, the threshold voltage (V/sub T/) of 4.5 V, and the subthreshold slope of 0.5 V/dec, and can be used in active matrix (AM) displays including organic light emitting diode (OLED) displays. The a-Si:H TFTs fabricated at 75/spl deg/C exhibit /spl mu//sub FE/ of 0.6 cm/sup 2/V/sup -1/s/sup -1/, and V/sub T/ of 4 V. It is shown that further improvement in TFT performance can be achieved by using n/sup +/ nc-Si contact layers and plasma treatments of the interface between the gate dielectric and the channel layer. The results demonstrate that with appropriate process optimization, the large area thin film Si technology suits well the fabrication of electronic devices on low-cost plastic substrates.

Low-temperature materials for thin-film transistors for flexible electronics

Disclosed are a shift register, and a gate driving circuit including a plurality of shift registers connected in sequence to respectively supply scan signals to a plurality of gate lines of a display device. Each shift register includes: an input unit which outputs a directional input signal having a gate high or low voltage based on an output signal from a previous or subsequent shift register to a first node; an inverter unit which is connected to the first node, generates an inverting signal to a signal at the first node, and outputs the inverting signal to a second node; and an output unit which includes a pull-up unit connected to the first node and activating an output clock signal based on the signal at the first node, and a pull-down unit activating and outputting a pull-down output signal based on a signal at the second node.

Shift register and gate driving circuit using the same

Embodiments of the present invention provides a shift register unit, driving method thereof, a shift register and a display device. A switch-off module is provided to disconnect electrical connections between a pull-up node and a precharge module and between the pull-up node and a pull-down module at a pull-up stage. As a result, it is able to prevent excessive electric leakage of a GOA circuit, thereby to improve the reliability and power consumption of the GOA circuit with an Oxide TFT.

Shift register unit, driving method thereof, shift register and display device

A shift register unit, a gate driving circuit and a display apparatus. The shift register unit comprises a bidirectional scan pre-charging module, a pulling-up module, a pulling-down control module, a reset module and a pulling-down module. A connection point where the bidirectional scan pre-charging module and the pulling-up module are connected serves as a pulling-up control node. A connection point where the pulling-down control module and the pulling-down module are connected serves as a pulling-down control node. The pulling-down control module is configured to perform a pulling-down control according to signals inputted from the second clock signal terminal, the third clock signal terminal, and the fourth clock signal terminal. A bidirectional scanning can be achieved by the bidirectional scan pre-charging module, and the potential at the pulling-up control node and the output signal of the signal output terminal are pulled down to the low level via the pulling-down module, so that the bidirectional pulling-down can be realized. Further, the shift register unit is driven by four clock signal terminals, thus reducing the power consumption of the circuit.

Shift Register Unit, Gate Driving Circuit And Display Apparatus

The invention provides a grid drive circuit with the self-compensation function. The grid drive circuit comprises a plurality of cascaded grid driver on array (GOA) units. The Nth grade of GOA unit comprises an upward-pull control module, an upward-pull module, a downward-transfer module, a first downward-pull module, a bootstrap capacitor module and a downward-pull maintaining module; the upward-pull module, the first downward-pull module, the bootstrap capacitor module and the downward-pull maintaining module are electrically connected with the Nth grade grid signal point Q(N) and the Nth grade horizontal scanning line G(N), the upward-pull control module and the downward-transfer module are electrically connected with the Nth grade grid signal point Q(N), and the first direct-current low voltage VSS1 and the second direct-current low voltage VSS2 are input into the downward-pull maintaining module. Due to the design of the downward-pull maintaining module with the self-compensation function, reliability of long-term operation of the grid drive circuit is improved; moreover, the design of the downward-pull maintaining module directly controlled by a set of direct-current signal source DC can be adopted for the grid drive circuit with the self-compensation function, and therefore not only can circuit layout design space be saved, but also the overall power consumption of the circuit can be reduced.

Grid drive circuit with self-compensation function

A gate driving circuit unit, a gate driving circuit and a display device are disclosed. The gate driving circuit unit comprises: a first clock signal control module, an input signal control module, a third clock signal control module and a fourth clock signal control module, wherein the first clock signal control module comprises a driving unit and a clock feed-through suppressing unit. The driving unit transmits a first clock signal to an output port after being switched on. The clock feed-through suppressing unit couples the control end of the driving unit to a signal output interface under control of the first clock signal. The input signal control module provides the driving voltage for the driving unit under control of an input pulse signal. The third clock signal control module provides the shutdown voltage for the driving unit.

Gate driving circuit unit, gate driving circuit and display device

A thorough study on the gate driver integrated with hydrogenated amorphous-silicon thin-film transistors (a-Si:H TFTs) for active-matrix flat-panel display (AM-FPD) is carried out in this work. The single stage circuit of the a-Si:H gate driver consists of input, pull-up, pull-down, and low-level holding units. The operation principle of the driver is described in detail. The subtle static and dynamic characteristics of the a-Si:H TFT based circuit are analyzed systematically for the first time. The long term reliability issue is also addressed. Design equations for determining the device sizes of the circuit are derived. The TFT-LCD panels integrated with the designed gate driver are fabricated to verify the design efficiency.

Design of Integrated Amorphous-Silicon Thin-Film Transistor Gate Driver

An integrated five-transistor/one-capacitor approach for realizing a a-Si:H thin-film transistor (TFT) gate driver operating in multiphase-clock mode is proposed and investigated. The driver needs only one large-size TFT and one small-size storage capacitor. The performance and function of the proposed driver are verified experimentally. The dependence of the performance on the device size is studied in detail. Stability of the fabricated drivers is tested using a flexible measurement scheme. Measured results show that the fabricated gate driver can work stably even though the low-level-holding TFTs have a threshold-voltage shift of 19 V.

Implementation of an a-Si:H TFT Gate Driver Using a Five-Transistor Integrated Approach

Grid electrode driving circuit unit, a grid electrode driving circuit and a display device

A fast integrated gate driver with amorphous silicon thin film transistor (a-Si:H TFT) is proposed in this paper. To improve the circuit speed, a new input scheme is designed to provide a full scale pre-charge voltage. So the loss of pre-charge voltage, a challenge in the conventional designs, is avoided. Simulations show that the proposed gate driver has a much improved driving speed in comparison with the conventional ones. The improvement is more effective in the case of the higher V TH and lower supply voltage. The proposed gate driver is suitable for high performance display applications.

Changde He

Papers

Gate driving circuit unit, gate driving circuit and display device

Design of Integrated Amorphous-Silicon Thin-Film Transistor Gate Driver

Implementation of an a-Si:H TFT Gate Driver Using a Five-Transistor Integrated Approach

Grid electrode driving circuit unit, a grid electrode driving circuit and a display device

A fast integrated a-Si gate driver