From the Publisher:
This work covers all aspects of physical design. The book is a core reference for graduate students and CAD professionals. For students, concept and algorithms are presented in an intuitive manner. For CAD professionals, the material presents a balance of theory and practice. An extensive bibliography is provided which is useful for finding advanced material on a topic. At the end of each chapter, exercises are provided, which range in complexity from simple to research level.

Algorithms for VLSI Physical Design Automation

The current status of VLSI layout and directions for future research are addressed, with emphasis on the authors' own work Necessary terminology and definitions and, whenever possible, a precise formulation of the problems are provided Placement and floorplanning for both the sea-of-gates and building-block designs are examined The former emphasizes the connectivity specification, whereas the latter must also consider module shape and size Global routing based on a method of successive cuts on a chip is discussed This is a hierarchical top-down approach that is useful for both of the above designs A two-dimensional detailed routing problem and the rip-up and rerouting problem are also discussed The field of computational geometry and its application to layout-in particular, to gridless routing and compaction-are reviewed, and layout engines are considered >

Recent advances in VLSI layout

For the macrocell design style and for routing problems in which the routing regions are irregular, two-dimensional routers are often necessary. In this paper, a new routing technique that can be applied for general two-layer detailed routing problems, including switchboxes, channels, and partially routed areas, is presented. The routing regions that can be handled are very general: the boundaries can be described by any rectilinear edges, the pins can be on or inside the boundaries of the region, and the obstructions can be of any shape and size. The technique is based on an algorithm that routes the nets in the routing region incrementally and intelligently, and allows modifications and rip-up of nets when an existing shortest path is "far" from optimal or when no path exists. The modification steps (also called weak modification) relocate some segments of nets already routed to find a shorter path or to make room for a blocked net. The rip-up and reroute steps (called strong modifiction) remove segments of nets already routed to make room for a blocked connection; these steps are invoked only if weak modification fails. The algorithm has been rigorously proven to complete in finite time and its complexity has been analyzed. The algorithm has been implemented in the "C" programming language. Many test cases have been run, and on all the examples known in the literature the router has performed as well as or better than existing algorithms. In particular, Burstein's difficult switchbox example has been routed using one less column than the original data. In addition, the router has routed difficult channels such as Deutsch's in density and has performed better than or as well as YACR-II on all the channels available to us.

A Detailed Router Based on Incremental Routing Modifications: Mighty

A new approach to the two-dimensional routing utilizing two layers is proposed. It consists of two major steps, topological routing and geometrical mapping. This paper describes the topological routing algorithm in detail. Based on a circle graph representation of the net intersection information of the routing problem, a maximal set of nets that can be routed without vias are selected. The layer assignments for the selected nets are determined by a global analysis so that the total number of vias needed is minimum. The layer assignment problem turns out to be a maximum-cut problem on an edge-weighted graph and we developed a greedy algorithm for it. According to the layer assignments, the detailed topological routes are then generated.

Minimum-Via Topological Routing

We present a new routing region definition and ordering (RRDO) scheme for building block layout. Given an arbitrary placement of rectangular blocks (including the case with cycles in the channel precedence constraints), without modifying the placement, our scheme defines and orders channels so that when a new channel is being routed, its width can be expanded or contracted without destroying the previously routed channels. The cycles in the channel precedence constraints are broken by introducing a new kind of channel--the L-shaped channels. Unlike switchboxes, L-shaped channels can be expanded or contracted to permit the completion of routing without rerouting other existing channels. An efficient greedy RRDO algorithm has been implemented, which tries to generate as few L-shaped channels as possible since L-shaped channels are harder to route than straight channels. Our algorithm represents routing regions by a floor plan graph, for which we provide a precise definition and a construction algorithm. The experimental results of the RRDO algorithm are promising.

Routing Region Definition and Ordering Scheme for Building-Block Layout

A general and practical river routing algorithm is described. It is assumed that there is one layer for routing and terminals are on the boundaries of an arbitrarily shaped rectilinear routing region. All nets are two-terminal nets with pre-assigned (may be different) widths and no crossover between nets is allowed. The minimum separation between the edges of two adjacent wires is input as the design rule. This algorithm assumes no grid on the plane and will always generate a solution if a solution exists. The number of corners is reduced by flipping of corners. An analysis to determine the minimum space required for a strait-type river routing problem is included. Let B be the number of boundary segments and T be the total number of terminals. The time complexity is of O(T(B+T) /sup 2/) and the storage required is O((B+T) /sup 2/). This algorithm is implemented as part of the design station under development at the University of California, Berkeley.

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General River Routing Algorithm

A new heuristic algorithm for two-dimensional routing utilizing two distinct layers is described. It is assumed that all terminals are on the boundary of a rectilinear routing region with or without cutout sections. Terminals on vertical boundary segments are assumed to be on one layer and those on horizontal boundary segments are on the other layer. This algorithm finds all possible paths with minimum corners for a net and then chooses one of those paths by considering path length, the likelihood of blocking nets not yet routed, the usage of vacant tracks, and the necessity of going through an area expected to be congested. A dynamic data structure is maintained. If h and v are the numbers of horizontal and vertical tracks, n is the number of nets, and t is the number of terminals, then the storage requirement is o(hv) and the time complexity is o((t-n)hv). For h=23, v=64, n=47, and t=130 the storage required is 60K bytes and cpu time is 16 seconds. This algorithm is implemented in the C language on a VAX 11/780 under the Berkeley Unix (FOOTNOTE: Unix is a trademark of Bell Laboratories.) Operating system, as part of the LTX layout system of the layout aids group at Bell Laboratories, Murray Hill.

Chi-Ping Hsu

Papers

General River Routing Algorithm

A New Two-Dimensional Routing Algorithm