From the Publisher:
This work covers all aspects of physical design. The book is a core reference for graduate students and CAD professionals. For students, concept and algorithms are presented in an intuitive manner. For CAD professionals, the material presents a balance of theory and practice. An extensive bibliography is provided which is useful for finding advanced material on a topic. At the end of each chapter, exercises are provided, which range in complexity from simple to research level.

Algorithms for VLSI Physical Design Automation

The current status of VLSI layout and directions for future research are addressed, with emphasis on the authors' own work Necessary terminology and definitions and, whenever possible, a precise formulation of the problems are provided Placement and floorplanning for both the sea-of-gates and building-block designs are examined The former emphasizes the connectivity specification, whereas the latter must also consider module shape and size Global routing based on a method of successive cuts on a chip is discussed This is a hierarchical top-down approach that is useful for both of the above designs A two-dimensional detailed routing problem and the rip-up and rerouting problem are also discussed The field of computational geometry and its application to layout-in particular, to gridless routing and compaction-are reviewed, and layout engines are considered >

Recent advances in VLSI layout

The layer assignment problem for interconnect is the problem of determining which layers should be used for wiring the signal nets. The objective of the layer assignment problem in general is to minimize the number of vias required. Thus, it is also referred to as the via minimization problem. In a via minimization problem, if the topology of the given layout is fixed, the problem is referred to as a constrained via minimization (CVM) problem. On the other hand, if both the topology of the layout and the layer assignment are to be decided, it is referred to as an unconstrained via minimization (UVM) problem. In this paper, both the CVM and UVM problems are studied. For the CVM problems, efficient algorithms which can be easily modified to take extra constraints into consideration are proposed. Experimental results show that the proposed algorithms for the CVM problem are time efficient compared with existing algorithms and generate better (near-optimal) results. For the UVM problems, a new heuristic approach is presented which generates better results but takes longer computing time. In the CVM problem, some vias are "essential" to the given layout. That is, they have to be selected and cannot be replaced by other possible vias. An efficient algorithm for identifying essential vias is also presented and discussed in this paper.

Efficient Algorithms for Layer Assignment Problem

Based on graph theory, a study of via minimization problem is presented. We show that the simplest problem of this type is NP-complete and propose a heuristic algorithm for topological via minimization.

An Unconstrained Topological Via Minimization Problem for Two-Layer Routing

This paper describes a graph theoretic algorithm which, given a particular layout, finds a layer assignment that requires the minimum number of vias. The time complexity of the algorithm is O(n /sup 3/) where n is the number of routing segments in the given layout. Unlike previous algorithms, this algorithm does not require the layout to be grid based and places no constraints on the location of vias or the number of wires that may be joined at a single junction. The algorithm yields globally optimum results when the maximum junction degree is limited to three and has been fully implemented.

Via Minimization for Gridless Layouts

A new approach to the two-dimensional routing utilizing two layers is proposed. It consists of two major steps, topological routing and geometrical mapping. This paper describes the topological routing algorithm in detail. Based on a circle graph representation of the net intersection information of the routing problem, a maximal set of nets that can be routed without vias are selected. The layer assignments for the selected nets are determined by a global analysis so that the total number of vias needed is minimum. The layer assignment problem turns out to be a maximum-cut problem on an edge-weighted graph and we developed a greedy algorithm for it. According to the layer assignments, the detailed topological routes are then generated.

Chi-Ping Hsu

Papers

Minimum-Via Topological Routing