There has been growing interest in single-inductor multiple-output (SIMO) dc-dc converters due to its reduced cost and smaller form factor in comparison with using multiple single-output converters. An application for such a SIMO-based switching converter is to drive multiple LED strings in a multichannel LED display. This paper proposes a quasi-hysteretic finite-state-machine-based digitally controlled single-inductor dual-output buck switching LED driver operating in discontinuous conduction mode (DCM) and extends it to drive multiple outputs. Based on the time-multiplexing control scheme in DCM, a theoretical upper limit of the total number of outputs in a SIMO buck switching LED driver for various backlight LED current values can be derived analytically. The advantages of the proposed SIMO LED driver include reducing the controller design complexity by eliminating loop compensation, driving more LED strings without limited by the maximum LED current rating, performing digital dimming with no additional switches required, and optimization of local bus voltage to compensate for variability of LED forward voltage VF in each individual LED string with smaller power loss. Loosely binned LEDs with larger VF variation can, therefore, be used for reduced LED costs.

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Scalability of Quasi-Hysteretic FSM-Based Digitally Controlled Single-Inductor Dual-String Buck LED Driver to Multiple Strings

This paper presents a wide-voltage-range, fast-transient all-digital buck converter using a high-resolution digital pulsewidth modulator (DPWM). The converter employs the multithreshold-voltage band-control technique to shorten its transient response. The DPWM uses an all-digital delay-locked loop (ADDLL) to control its cycle. The usage of ADDLL leads to the DPWM possessing a small area while maintaining high cycle resolution. Moreover, the proposed ADDLL-based cycle-controlled DPWM can achieve synchronization between its input and output. This decreases the loop delay of the proposed converter so that the system is easy to be stabilized. The prototype chips of both the ADDLL-based cycle-controlled DPWM and the all-digital buck converter are fabricated in 0.35- $\mu \text{m}$ CMOS process. Measurement results of the cycle-controlled DPWM show that the duty cycle of its output is adjustable from 1% to 99% in a 0.78% increment per step when operating at 1 MHz. The measured transition time of the all-digital buck converter is $ when the load current changes from 50 to 500 mA, and vice versa.

A Fast-Transient Wide-Voltage-Range Digital-Controlled Buck Converter With Cycle-Controlled DPWM

In this paper, a digitally controlled Single Input Dual Output (SIDO) buck converter with Phase Sequence Interchange (PSI) scheme for reducing transient cross-regulation is proposed. The PSI scheme is especially designed to solve cross-regulation problem that is usually seen when load steps up in a voltage-mode SIDO buck converter operating in continuous conduction mode (CCM). In addition, a discharging path is employed to reduce cross-regulation during load drop. The digital control of the proposed scheme is implemented and verified by the FPGA. Experimental results show that the suppression of the cross-regulation is comparable to the other state-of-the-art.

Digitally controlled low cross-regulation single-inductor dual-output (SIDO) buck converter

This paper presents the use of a combined random pulse position modulation (RPPM)/digital pulsewidth modulation (DPWM) digital controller for a buck converter to simultaneously achieve low-conductive electromagnetic interference (EMI) and a fast transient response. An area-efficient RPPM/DPWM controller suitable for advanced system-on-chip integration is proposed and implemented in a field-programmable gate array-based prototype to verify its EMI-suppression capability. The experimental results for a 1.2-V digital buck converter show that the proposed digital switching regulator can switch between RPPM and DPWM modes smoothly and automatically. Closed-loop system measurements demonstrate that, compared to DPWM, up to 17.27 and 14.99 dB power spectra reductions are obtained in the input current and switching node, respectively.

A Digitally Controlled Switching Regulator With Reduced Conductive EMI Spectra

This paper describes the complete design and implementation of a low-power sigma-delta DPWM (Σ-Δ DPWM) controller for switching converter which can operate at a very high frequency. In the previous design approach, the effective resolution of Σ-Δ DPWM, i.e. the effective number of bit (ENOB) is over-estimated by using the conventional signal-to-noise ratio (SNR) with a continuous-time sine-wave input. Therefore, the modified expressions of SNR and ENOB are presented, which are suitable for the digital sigma-delta modulator (Σ-Δ MOD) with a discrete-time discrete-amplitude signal. In addition, the trade off between the hardware area consumption and the SNR value is discussed. Finally, the system simulation results of the general 10-b DPWM controller and 10-b effective resolution ΣΔ DPWM controller for buck converter are shown to verify the proposed design approach

Design and implementation of sigma-delta DPWM controller for switching converter

Based on digital controllers offering significant advantages in DC-DC converters, this paper proposes a digital PWM controller for single-inductor dual-output (SIDO) switching converter operating in discontinuous-conduction mode (DCM). By adopting time-multiplexing (TM) scheme, this converter provides two independent supply voltages using only one inductor, which is suitable for portable devices and system-on-chip (SoC) integration. All design issues of each block including analog-to-digital converter (ADC), digital compensator and digital pulse width modulator (DPWM) are discussed. To save chip area, single look-up table based compensator and modified hybrid DPWM are developed. Simulation results are shown to verify the validity of the proposed work.

Digital PWM controller for SIDO switching converter with time-multiplexing scheme

Despite significant advantages over analog counterparts, digital controllers for switching DC-DC converters demand the use of different tools such as MATLAB/SIMULINK and Verilog-AMS to model and simulate the design. As a consequence, this inevitably complicates the design procedure. A novel approach is therefore proposed to simplify the process. By using the GUI-based tool developed, the controller for digitally controlled buck converter can be automatically designed and implemented with Verilog HDL under a unique and consistent MATLAB/SIMULINK environment. Verification results of both system-level and mixed-level models are given to show the validity of the proposed design approach.

An integrated GUI design tool for digitally controlled switching DC-DC converter

This paper describes design and implementation of a digitally controlled single-inductor dual-output SIDO buck converter operating in discontinuous conduction mode. This converter adopts time-multiplexing control in providing two independent output voltages using only an inductor. The design issues of the digital controller are discussed, including static and dynamic characteristics. Implementation of the controller, a modified hybrid digital pulse width modulator and a single look-up table are developed. The digital controller was implemented on a field-programmable gate array-based control board. Experimental results demonstrating system validity are presented for a SIDO buck converter with nominal 3.6V input voltage, and the outputs are regulated at 1.8 and 2.2V. Copyright © 2012 John Wiley & Sons, Ltd.

Design and implementation of a digitally controlled single-inductor dual-output SIDO buck converter

This paper presents a design methodology of a continuous-time (CT) Band-pass (BP) DeltaSigma modulator which can improve the design procedure. The proposed top-down, mixed-level design platform is implemented under Cadencepsilas Spectre environment using Verilog-A. A 2nd order CT BP DeltaSigma modulator for WCDMA applications. The central frequency of this modulator is at 100 MHz and the quantizer operates at 400 MHz clock frequency. The modulator is designed using TSMC 0.35 mum CMOS technology with a supply voltage of 3.3 V. The simulated maximum SNDR is 40 dB for a 3.84 MHz bandwidth, which corresponds to a resolution of 6 bits.

Chi-Wai Leng

Papers

Design and implementation of sigma-delta DPWM controller for switching converter

Digital PWM controller for SIDO switching converter with time-multiplexing scheme

An integrated GUI design tool for digitally controlled switching DC-DC converter

Design and implementation of a digitally controlled single-inductor dual-output SIDO buck converter

A top-down, mixed-level design methodology for CT BP ΔΣ modulator using verilog-A