This invention relates to a method of forming a bottomless liner structure. The method involves the steps of first obtaining a material having a via. Next, a first layer is deposited on the material, the first layer covering the sidewalls and bottom of the via. Finally, a second layer is sputter deposited on the first material, the material Rf biased during at least a portion of the time that the second layer is sputter deposited, such that the first layer deposited on the bottom of the via is substantially removed and substantially all of the first layer deposited on the sidewalls of the via is unaffected.

Open-bottomed via liner structure and method for fabricating same

A method for fabricating solder bumps on a microelectronic device having contact pads includes the steps of depositing a titanium barrier layer on the device, forming an under bump metallurgy layer on the titanium barrier layer, and forming one or more solder bumps on the under bump metallurgy layer. The solder bump or bumps define exposed portions of the under bump metallurgy layer which are removed, and then the exposed portion of the titanium barrier layer is removed. The titanium barrier layer protects the underlying microelectronic device from the etchants used to remove the under bump metallurgy layer. The titanium layer also prevents the under bump metallurgy layer from forming a residue on the underlying microelectronic device. Accordingly, the titanium barrier layer allows the under bump metallurgy layer to be quickly removed without leaving residual matter thereby reducing the possibility of electrical shorts between solder bumps.

Solder bump fabrication methods and structure including a titanium barrier layer

A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.

Semiconductor device, manufacturing method and apparatus for the same

The present invention relates to an improved method for forming UBM pads and solder bump connections for a flip chip which eliminates at least one mask step required in standard UBM pad forming processes. The method also includes repatterning bond pad locations.

Conductive bumps on die for flip chip application

Methods of forming an electronic structure may include forming a seed layer on an electronic substrate, and forming a conductive shunt layer on portions of the seed layer wherein portions of the seed layer are free of the conductive shunt layer. A conductive barrier layer may be formed on the conductive shunt layer opposite the seed layer wherein the conductive shunt layer comprises a first material and wherein the barrier layer comprises a second material different than the first material. Moreover, a solder layer may be formed on the barrier layer opposite the conductive shunt layer wherein the solder layer comprises a third material different than the first and second materials. Related structures are also discussed.

Methods of forming electronic structures including conductive shunt layers and related structures

A metallurgical joint structure between two workpieces to be joined by soldering or brazing includes a stress release layer of a low yield point metal, preferably silver, gold, copper, palladium or platinum. The joint structure also includes a juxtaposed barrier layer to prevent the diffusion of a solder element, such as tin, to the stress release layer. Preferred barrier layers are chromium, titanium-tungsten and tantalum. Preferably, the joint includes one or more stress relief layer and associated barrier layer combinations in the joint structure for improved joint reliability.

Chin-Jong Chan

Papers

Metallurgical joint including a stress release layer