High-performance parallel computer architecture and systems have been improved at a phenomenal rate. In the meantime, VLSI computer-aided design (CAD) software for multibillion-transistor IC design has become increasingly complex and requires prohibitively high computational resources. Recent studies have shown that, numerous CAD problems, with their high computational complexity, can greatly benefit from the fast-increasing parallel computation capabilities. However, parallel programming imposes big challenges for CAD applications. Fully exploiting the computational power of emerging general-purpose and domain-specific multicore/many-core processor systems, calls for fundamental research and engineering practice across every stage of parallel CAD design, from algorithm exploration, programming models, design-time and run-time environment, to CAD applications, such as verification, optimization, and simulation. This journal special section will cover recent progress on parallel CAD research, including algorithm foundations, programming models, parallel architectural-specific optimization, and verification. More specifically, papers with in-depth and extensive coverage of the following topics will be considered, as well as other topics relevant to the design of parallel CAD algorithms and software tools. 1. Parallel algorithm design and specification for CAD applications 2. Parallel programming models and languages of particular use in CAD 3. Runtime support and performance optimization for CAD applications 4. Parallel architecture-specific design and optimization for CAD applications 5. Parallel program debugging and verification techniques particularly relevant for CAD The papers should be submitted via the Manuscript Central website and should adhere to standard ACM TODAES formatting requirements (http://todaes.acm.org/). The page count limit is 25.

Parallel CAD: Algorithm Design and Programming Special Section Call for Papers TODAES: ACM Transactions on Design Automation of Electronic Systems

A two-stage optimization methodology is proposed to solve the fixed-outline floorplanning problem that is a global optimization problem for wirelength minimization. In the first stage, an attractor-repeller convex optimization model provides the relative positions of the modules on the floorplan. The second stage places and sizes the modules using second-order cone optimization. A Voronoi diagram is employed to obtain a planar graph and thus a relative position matrix to connect the two stages. Overlap-free and deadspace-free floorplans are achieved in a fixed outline and floorplans with any specified percentage of whitespace can be produced. Experimental results on GSRC benchmarks demonstrate that we obtain significant improvements on the best results known in the literature for these benchmarks. Most importantly, our methodology provides greater improvement over other floor-planners as the number of modules increases.

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Large-scale fixed-outline floorplanning design using convex optimization techniques

Floorplanning is crucial in VLSI chip design as it determines the time-to-market and the quality of the product. In this work, Variable-Order Ant System (VOAS) is developed and combined with a floorplan model namely Corner List (CL) to optimize the area and wirelength. CL is used to represent the floorplan layout. Although CL has proven to have the same search space and time complexity as Corner Sequence (CS), comparatively, CL has more corners to be selected. This compensates the sequence weakness, where modules can be placed freely onto the corners, which are not bounded by the floorplan contour. Two groups of ants, namely VOAS and reconnaissance ants, which will collaborate with each other to determine the local information, are introduced. Through this cooperation, VOAS ant can ascertain its local information greedily, based on the local search space information carried out by reconnaissance ants. Subsequently, VOAS ant proposes a new variable-order property to prioritize the global and local explorations. The variable-order property enables the ants in VOAS to weigh a better choice of modules for the floorplanning, based on the local and global information. The update rules of VOAS are modified in order to handle two-dimensional problem, such as VLSI floorplanning. VOAS shows improved results in terms of purely area optimization as well as composite function of area and wirelength, as compared to other state-of-the-art and recent floorplanning/placement algorithms based on Microelectronics Centre of North Carolina (MCNC) and Gigascale Systems Research Center (GSRC) benchmarks.

Variable-Order Ant System for VLSI multiobjective floorplanning

In this work, we present a miniaturized high definition vision system inspired by insect eyes, with a distributed illumination method, which can work in dark environments for proximity imaging applications such as endoscopy. Our approach is based on modeling biological systems with off-the-shelf miniaturized cameras combined with digital circuit design for real time image processing. We built a 5 mm radius hemispherical compound eye, imaging a 180°×180° degrees field of view while providing more than 1.1 megapixels (emulated ommatidias) as real-time video with an inter-ommatidial angle ∆ϕ = 0.5° at 18 mm radial distance. We made an FPGA implementation of the image processing system which is capable of generating 25 fps video with 1080 × 1080 pixel resolution at a 120 MHz processing clock frequency. When compared to similar size insect eye mimicking systems in literature, the system proposed in this paper features 1000 × resolution increase. To the best of our knowledge, this is the first time that a compound eye with built-in illumination idea is reported. We are offering our miniaturized imaging system for endoscopic applications like colonoscopy or laparoscopic surgery where there is a need for large field of view high definition imagery. For that purpose we tested our system inside a human colon model. We also present the resulting images and videos from the human colon model in this paper.

An Insect Eye Inspired Miniaturized Multi-Camera System for Endoscopic Imaging.

This paper describes the application space exploration of a heterogeneous digital signal processor with dynamic reconfiguration capabilities. The device is built around three reconfigurable engines featuring different flavours and computation granularities that make it suitable for a wide range of signal processing application domains such as video coding, image processing, telecommunications, and cryptography. Performance of signal processing applications is evaluated from measurements performed on a CMOS 90 nm prototype. In order to characterize the application space of the processor, performance is compared with state-of-the-art devices, taking programmability, computational capabilities, and energy efficiency as the main metrics. The device exploits performance and energy efficiency significantly more than general purpose processors, while still maintaining a user-friendly programming approach that mainly relies on software-oriented languages. The device is able to achieve 1.2 to 15 GOPS with an energy efficiency from 2 to 50 GOPS/W when running the selected applications.

Application Space Exploration of a Heterogeneous Run-Time Configurable Digital Signal Processor

Fixed-outline floorplanning using robust evolutionary search

Minimally Invasive Surgery (MIS) is a current major technique for surgery. Compared to traditional methods of surgery, MIS can reduce the post-surgical recovery time, cost and pain to patients due to surgery. It is therefore in the interest of doctors and patients. There are several MIS techniques that have been widely accepted for diagnosis and treatment in most hospitals, such as hysteroscopy, laparoscopy, and colon endoscopy. The major problem of MIS is a narrow field of vision. We develop and validate a MIS Panoramic Endoscope (MISPE) to provide doctors with broad fields of view. MISPE features a combination of image overlapping and image stitching. The panoramic image apparatus has two side-by-side endoscopic lenses that provide wide-angle inputs for image stitching. MISPE can provide doctors with panoramic images, so that doctors can easily discriminate the organ's positions between surgery operations. Experimental results show that MISPE can enhance the image size up to 155%. The whole system is validated by personal computer. The animal vivo experimental videos have been successfully validated.

A panoramic endoscope design and implementation for Minimally Invasive Surgery

This article proposes a low-cost, low-power multistandard video decoder for high definition (HD) video applications. The proposed design supports multiple-standard (JPEG baseline, MPEG-1/2/4 Simple Profile (SP), and H.264 Baseline Profile (BP)) video decoding through interactive parsing control and common parameter bus interface. In order to reduce hardware cost, the shared adder-based structure and reusable data management are proposed to achieve hardware sharing and reduce internal memory size, respectively. In addition, the proposed design is optimized through reducing memory bandwidth by increasing both data reuse amount and burst length of memory access as well as eliminating cycle overhead in data access for supporting HD video decoding with single AHB-based SDR memory. The proposed 252Kgates/4.9kB/71mW/0.13μm multi-standard video decoder reduces 72p in gate count and 87p in power consumption as compared to the state-of-the-art design, when operating at 120MHz for real-time HD1080 video decoding with single AHB-based SDR memory.

A 252Kgates/4.9Kbytes SRAM/71mW multistandard video decoder for high definition video applications

As device size continues to shrink in the sub-micron regime, power supply noise is becoming a performance and reliability bottleneck in modern VLSI design. In this paper, we propose a new floorplanning methodology for fast power supply noise design convergence. By evaluating power supply noise at this early design stage, area-efficient floorplans with considering IR voltage drop and electromigration (EM) are generated. Compared to designs based on area-optimized floorplans, the proposed methodology achieves noise-satisfied designs with an average 52% less power routing resource.

Noise-Aware Floorplanning for Fast Power Supply Network Design

It is generally accepted that robotic surgery has increased in popularity which has revolutionized the medical field over the past few decades. Despite many successes and development, there are still a lot of challenges what was remained in the surgeries such as the requirement of haptic feedback system has become a raising issue due to a lot of failure cases during robotic surgery processes, for example: suture breakage because of pulling action in knot-tying, slipped on a needle of grasping action or inadequate of force. In this paper, an image-based force sensing feedback system is presented. The force feedback system can provide unmistakable for the surgeon how much force they are utilizing by showing corresponding colors, which can reduce instances of surgery failure without negatively impacting the surgeon 's performance. Visual images-based were employed to watching the distance changing of plasticity sensor during the time it was suffering an opposite reaction force from grasping action of a surgery robot arm. From the experiments, this visual images-based evaluation method can detect a minimum force value of 0.01 Newton. This system provides extraordinary accuracy of force sensing feedback and also hands controlling for a robot arm, due to the accuracy shows up to 99.96% (hands action recognition). The main distribution of this studying is to give robot-arm can use the proposed technique to estimate and utilize force values for surgical operation.

Ching-Hwa Cheng

Papers

Fixed-outline floorplanning using robust evolutionary search

A panoramic endoscope design and implementation for Minimally Invasive Surgery

A 252Kgates/4.9Kbytes SRAM/71mW multistandard video decoder for high definition video applications

Noise-Aware Floorplanning for Fast Power Supply Network Design

An Intelligent Image-Based Force Sensing System Development to Assist Robot-Arm Surgery