Kokkos: Enabling manycore performance portability through polymorphic memory access patterns

The manycore revolution in computational hardware can be characterized by increasing thread counts, decreasing memory per thread, and architecture specific performance constraints for memory access patterns. High performance computing (HPC) on emerging many core architectures requires codes to exploit every opportunity for thread-level parallelism and satisfy conflicting performance constraints. We developed the Kokkos C++ library to provide scientific and engineering codes with a user accessible many core performance portable programming model. The two foundational abstractions of Kokkos are (1) dispatch work to a many core device for parallel execution and (2) manage multidimensional arrays with polymorphic layouts. The integration of these abstractions enables users' code to satisfy multiple architecture specific memory access pattern performance constraints without having to modify their source code. In this paper we describe the Kokkos abstractions, summarize its application programmer interface (API), and present performance results for a molecular dynamics computational kernel and finite element mini-application.

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Kokkos: Enabling Performance Portability Across Manycore Architectures

Direct numerical simulations of reacting flows with detailed chemistry using many-core/GPU acceleration

. Weather and climate models are complex pieces of software which include many individual components, each of which is
evolving under pressure to exploit advances in computing to enhance some combination of a range of possible
improvements (higher spatio-temporal resolution, increased fidelity in terms of resolved processes, more quantification of
uncertainty, etc.). However, after many years of a relatively stable computing environment with little choice in processing
architecture or programming paradigm (basically X86 processors using MPI for parallelism), the existing menu of processor
choices includes significant diversity, and more is on the horizon. This computational diversity, coupled with ever
increasing software complexity, leads to the very real possibility that weather and climate modelling will arrive at
a chasm which will separate scientific aspiration from our ability to develop and/or rapidly adapt codes to the available
hardware. In this paper we review the hardware and software trends which are leading us towards this chasm, before describing
current progress in addressing some of the tools which we may be able to use to bridge the chasm. This brief introduction
to current tools and plans is followed by a discussion outlining the scientific requirements for quality model codes which
have satisfactory performance and portability, while simultaneously supporting productive scientific evolution. We assert
that the existing method of incremental model improvements employing small steps which adjust to the changing hardware
environment is likely to be inadequate for crossing the chasm between aspiration and hardware at a satisfactory pace, in
part because institutions cannot have all the relevant expertise in house. Instead, we outline a methodology based on
large community efforts in engineering and standardisation, which will depend on identifying a taxonomy of key
activities – perhaps based on existing efforts to develop domain-specific languages, identify common patterns in weather
and climate codes, and develop community approaches to commonly needed tools and libraries – and then collaboratively
building up those key components. Such a collaborative approach will depend on institutions, projects, and individuals
adopting new interdependencies and ways of working.

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Crossing the chasm: how to develop weather and climate models for next generation computers?

Large, complex scientific and engineering application code have a significant investment in computational kernels which implement their mathematical models. Porting these computational kernels to multicore-CPU and manycore-accelerator (e.g., NVIDIA® GPU) devices is a major challenge given the diverse programming models, application programming interfaces (APIs), and performance requirements. The Kokkos Array programming model provides library-based approach for implementing computational kernels that are performance-portable to multicore-CPU and manycore-accelerator devices. This programming model is based upon three fundamental concepts: (1) manycore compute devices each with its own memory space, (2) data parallel computational kernels, and (3) multidimensional arrays. Performance-portability is achieved by decoupling computational kernels from device-specific data access performance requirements (e.g., NVIDIA coalesced memory access) through an intuitive multidimensional array API. The Kokkos Array API uses C++ template meta-programming to, at compile time, transparently insert device-optimal data access maps into computational kernels. With this programming model computational kernels can be written once and, without modification, performance-portably compiled to multicore-CPU and manycore-accelerator devices.

Kokkos Array performance-portable manycore programming model

Large, complex scientific and engineering application code have a significant investment in computational kernels to implement their mathematical models. Porting these computational kernels to the collection of modern manycore accelerator devices is a major challenge in that these devices have diverse programming models, application programming interfaces APIs, and performance requirements. The Kokkos Array programming model provides library-based approach to implement computational kernels that are performance-portable to CPU-multicore and GPGPU accelerator devices. This programming model is based upon three fundamental concepts: 1 manycore compute devices each with its own memory space, 2 data parallel kernels and 3 multidimensional arrays. Kernel execution performance is, especially for NVIDIA® devices, extremely dependent on data access patterns. Optimal data access pattern can be different for different manycore devices --potentially leading to different implementations of computational kernels specialized for different devices. The Kokkos Array programming model supports performance-portable kernels by 1 separating data access patterns from computational kernels through a multidimensional array API and 2 introduce device-specific data access mappings when a kernel is compiled. An implementation of Kokkos Array is available through Trilinos [Trilinos website, http://trilinos.sandia.gov/, August 2011].

/pdf/manycore-performance-portability-kokkos-multidimensional-4urvxt3gp3.pdf

Manycore performance-portability: Kokkos multidimensional array library

Large, complex scientific and engineering application code have a significant investment in computational kernels to implement their mathematical models. Porting these computational kernels to the collection of modern many core accelerator devices is a major challenge in that these devices have diverse programming models, application programming interfaces (APIs), and performance requirements. The Trilinos-Kokkos array programming model provides library based approach to implement computational kernels that are performance-portable to CPU-multicore and GPGPU accelerator devices. This programming model is based upon three fundamental concepts: (1) there exists one or more many core compute devices each with its own memory space, (2) data parallel kernels are executed via parallel for and parallel reduce operations, and (3) kernels operate on multidimensional arrays. Kernel execution performance is, especially for NVIDIA R GPGPU devices, extremely dependent on data access patterns. An optimal data access pattern can be different for different many core devices -- potentially leading to different implementations of computational kernels specialized for different devices. The Trilinos-Kokkos programming model support performance-portable kernels by separating data access patterns from computational kernels through a multidimensional array API. Through this API device-specific mappings of multiindices to device memory are introduced into a computational kernel through compile-time polymorphism, i.e., without modification of the kernel.

Chris Amsler

Papers

Manycore performance-portability: Kokkos multidimensional array library

Multicore/GPGPU Portable Computational Kernels via Multidimensional Arrays