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Christof Paar

Researcher at Max Planck Society

Publications -  409
Citations -  23389

Christof Paar is an academic researcher from Max Planck Society. The author has contributed to research in topics: Cryptography & Encryption. The author has an hindex of 69, co-authored 399 publications receiving 21790 citations. Previous affiliations of Christof Paar include University of Massachusetts Amherst & University of Duisburg-Essen.

Papers
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Journal ArticleDOI

An experimental security analysis of two satphone standards

TL;DR: Develop and demonstrate more practical attacks on A5-GMR-1, summarize current research results in the field of GMR-1 andGMR-2 security, and shed light on the amount of work and expertise it takes from setting out to analyze a complex system to actually break it in the real world are shed.
Proceedings ArticleDOI

SPFA: SFA on Multiple Persistent Faults

TL;DR: This work uses the potency of Statistical Fault Analysis (SFA) in the persistent fault setting, presenting Statistical Persistent Fault analysis (SPFA) as a more general approach of PFA.
Book ChapterDOI

Performance of HECC coprocessors using inversion-free formulae

TL;DR: The main finding of the present contribution is that coprocessors based on the inversion-free formulae should be preferred compared to those using group operations containing inversion.
Posted Content

Collision Timing Attack when Breaking 42 AES ASIC Cores.

TL;DR: In this paper, a collision timing attack which exploits the data-dependent timing characteristics of combinational circuits is demonstrated. The attack is based on the correlation collision attack presented at CHES 2010, and the timing attributes of the combinational circuit when implementing complex functions, e.g., S-boxes, in hardware are exploited by the help of the scheme used in another CHES2010 paper namely fault sensitivity analysis.

Design of Low-Power DPA-Resistant Cryptographic Functional Units

TL;DR: This methodology can be used to automatically identify and to isolate the DPAcritical nodes, as well as to map them onto a robust cell library that is compatible with conventional deep-submicron CMOS technologies.