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Christopher J. Hughes
Researcher at Intel
Publications - 163
Citations - 4280
Christopher J. Hughes is an academic researcher from Intel. The author has contributed to research in topics: Cache & Cache pollution. The author has an hindex of 32, co-authored 161 publications receiving 4047 citations. Previous affiliations of Christopher J. Hughes include University of Illinois at Urbana–Champaign.
Papers
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Proceedings ArticleDOI
Speculative precomputation: long-range prefetching of delinquent loads
Jamison D. Collins,Hong Wang,Dean M. Tullsen,Christopher J. Hughes,Yong-Fong Lee,Dan Lavery,John Paul Shen +6 more
TL;DR: This paper explores Speculative Precomputation, a technique that uses idle thread context in a multithreaded architecture to improve performance of single-threaded applications by pre-computing future memory accesses in available thread contexts, and prefetching these data.
Proceedings ArticleDOI
Performance evaluation of Intel® transactional synchronization extensions for high-performance computing
TL;DR: The first hardware implementation of Intel TSX is evaluated using a set of high-performance computing (HPC) workloads, and it is demonstrated that applying IntelTSX to these workloads can provide significant performance improvements.
Proceedings ArticleDOI
Hybrid transactional memory
TL;DR: This work proposes a novel hybrid hardware-software transactional memory scheme that approaches the performance of a hardware scheme when resources are not exhausted and gracefully falls back to a software scheme otherwise.
Proceedings ArticleDOI
Carbon: architectural support for fine-grained parallelism on chip multiprocessors
TL;DR: Carbon is proposed, a hardware technique to accelerate dynamic task scheduling on scalable CMPs and delivers significant performance improvements over the best software scheduler: on average for 64 cores, 68% faster on a set of loop-parallel benchmarks, and 109% better on aset of task-par parallel benchmarks.
Journal ArticleDOI
Rsim: simulating shared-memory multiprocessors with ILP processors
TL;DR: The authors' experience with Rsim demonstrates that modeling ILP features is important even in shared-memory multiprocessor systems, and plans to release a new Rsim version shortly that will include instruction caches, TLBs, multimedia extensions, simultaneous multithreading, Rabbit fast simulation mode, and ports to Linux platforms.