The conversion of body heat into electrical energy using a thermoelectric (TE) power generator is useful for wearable self-powered mobile electronic systems such as medical sensors or smart watches. We herein demonstrate a glass fabric-based flexible TE generator using a screen printing technique and the self-sustaining structure of a TE device without top and bottom substrates. With this technique it is possible to make the device thin (∼500 μm), lightweight (∼0.13 g cm−2), and flexible. In addition, the developed TE generator achieved an unprecedentedly large output power density which is several tens of times higher than that of flexible TE generators reported to date. The developed TE generator shows an allowable bending radius of as low as 20 mm and no change in performance by repeated bending for 120 cycles. This work can expedite the development of wearable self-powered mobile devices.

A wearable thermoelectric generator fabricated on a glass fabric

A long-range UHF RF identification (RFID) sensor has been designed using a 0.35- ?m CMOS standard process. The power-optimized tag, combined with the ultralow-power temperature sensor, allows an ID and a temperature reading range of 2 m from a 2-W effective radiated power output power reader. The temperature sensor is based on a ring oscillator, where the temperature dependence of the oscillation frequency is used for thermal sensing. The temperature sensor exhibits a resolution of 0.035°C and an inaccuracy value lower than 0.1°C in the range from 35°C to 45°C after two-point calibration. The average power consumption of the temperature sensor is only 110 nW at ten conversions per second while keeping a high resolution and accuracy. These properties allow the use of the RFID as a batteryless sensor in a wireless human body temperature monitoring system.

Full Passive UHF Tag With a Temperature Sensor Suitable for Human Body Temperature Monitoring

Microprocessor design has recently encountered many constraints such as power, energy, reliability, and temperature. Among these challenging issues, temperature-related issues have become especially important within the past several years. We summarize recent thermal management techniques for microprocessors, focusing on those that affect or rely on the microarchitecture. We categorize thermal management techniques into six main categories: temperature monitoring, microarchitectural techniques, floorplanning, OS/compiler techniques, liquid cooling techniques, and thermal reliability/security. Temperature monitoring, a requirement for Dynamic Thermal Management (DTM), includes temperature estimation and sensor placement techniques for accurate temperature measurement or estimation. Microarchitectural techniques include both static and dynamic thermal management techniques that control hardware structures. Floorplanning covers a range of thermal-aware floorplanning techniques for 2D and 3D microprocessors. OS/compiler techniques include thermal-aware task scheduling and instruction scheduling techniques. Liquid cooling techniques are higher-capacity alternatives to conventional air cooling techniques. Thermal reliability/security issues cover temperature-dependent reliability modeling, Dynamic Reliability Management (DRM), and malicious codes that specifically cause overheating. Temperature-related issues will only become more challenging as process technology continues to evolve and transistor densities scale up faster than power per transistor scales down. The overall objective of this survey is to give microprocessor designers a broad perspective on various aspects of designing thermal-aware microprocessors and to guide future thermal management studies.

/pdf/recent-thermal-management-techniques-for-microprocessors-1zp0axncko.pdf

Recent thermal management techniques for microprocessors

An ultra-low power embedded CMOS temperature sensor based on serially connected subthreshold MOS operation is implemented in a 0.18 μm CMOS process for passive RFID food monitoring applications. Employing serially connected subthreshold MOS as sensing element enables reduced minimum supply voltage for further power reduction, which is of utmost importance in passive RFID applications. Both proportional-to-absolute-temperature (PTAT) and complimentary-to-absolute-temperature (CTAT) signals can be obtained through proper transistor sizing. With the sensor core working under 0.5 V and digital interfacing under 1 V, the sensor dissipates a measured total power of 119 nW at 333 samples/s and achieves an inaccuracy of + 1/-0.8°C from - 10°C to 30°C after calibration. The sensor is embedded inside the fabricated passive UHF RFID tag. Measurement of the sensor performance at the system level is also carried out, illustrating proper sensing operation for passive RFID applications.

/pdf/a-sub-mu-w-embedded-cmos-temperature-sensor-for-rfid-food-4h18oblyz7.pdf

A Sub- $\mu$ W Embedded CMOS Temperature Sensor for RFID Food Monitoring Application

The fabrication and characterization of highly flexible textiles are reported. These textiles can harvest thermal energy from temperature gradients in the desirable through-thickness direction. The tiger yarns containing n- and p-type segments are woven to provide textiles containing n-p junctions. A high power output of up to 8.6 W m(-2) is obtained for a temperature difference of 200 °C.

/pdf/woven-yarn-thermoelectric-textiles-4ornwiw56k.pdf

Woven-Yarn Thermoelectric Textiles.

A time-to-digital-converter-based CMOS smart temperature sensor without a voltage/current analog-to-digital converter (ADC) or bandgap reference is proposed for high-accuracy portable applications. Conventional smart temperature sensors rely on voltage/current ADCs for digital output code conversion. For the purpose of cost reduction and power savings, the proposed smart temperature sensor first generates a pulse with a width proportional to the measured temperature. Then, a cyclic time-to-digital converter is utilized to convert the pulse into a corresponding digital code. The test chips have an extremely small area of 0.175 mm/sup 2/ and were fabricated in the TSMC CMOS 0.35-/spl mu/m 2P4M process. Due to the excellent linearity of the digital output, the achieved measurement error is merely -0.7/spl sim/+0.9/spl deg/C after two point calibration, but without any curvature correction or dynamic offset cancellation. The effective resolution is better than 0.16/spl deg/C, and the power consumption is under 10 /spl mu/W at a sample rate of 2 samples/s.

A time-to-digital-converter-based CMOS smart temperature sensor

A time-to-digital-converter-based CMOS smart temperature sensor is proposed for high-accuracy portable applications. Conventional smart temperature sensors rely on an analog-to-digital converter, which consumes much chip area and operating power, for digital output code conversion. For the purpose of cost reduction and power saving, the proposed smart temperature sensor first generates a pulse with a width proportional to the measured temperature. Then, a cyclic time-to-digital converter (TDC) is utilized to convert the pulse into the corresponding digital code. The test chips, with extremely small area of 0.175 mm/sup 2/, were fabricated by the TSMC CMOS 0.35 /spl mu/m 2P4M process. Due to the excellent linearity of the digital output, the achieved measurement error is merely -0.6/spl deg/C to +0.8/spl deg/C without any curvature correction or dynamic offset-cancellation. The effective resolution is better than 0.15/spl deg/C, and the power consumption is 10 /spl mu/W.

A low-cost and low-power CMOS time-to-digital converter (TDC) with 50-ps time resolution is proposed in this paper. The reference clock frequency of the TDC is 80 MHz and the input range is theoretically unlimited. Two parallel time interpolators are used to improve the resolution by pulse stretching. In addition to conventional current ratio and capacitor ratio, the duty cycle of the discharging clock is also incorporated to adjust the stretch factor to reduce the power consumption and chip area dramatically. The interpolators are based on analog dual-slope conversion. The time resolution is measured as 50 ps and the integral nonlinearity (INL) error is within plusmn1.1 LSB for input range up to 250ns. The temperature drift of the measured resolution is -15.2% to +13% over a temperature range of -40degC to 80degC, which is significantly smaller than plusmn125% drift over 100degC temperature range in previous work. The voltage drift is 3.8 ps/V or equivalently plusmn3.5% over 3.0-4.0 V supply voltage range. The measured resolution is within 49.8 ps to 52.7 ps for six packaged chips and the chip size is merely 0.5 mmtimes0.45mm as fabricated in the TSMC 0.35-mum CMOS digital process. The power consumption is 0.75mW, enormously reduced from hundreds of milliwatts of the predecessors, at 100 k samples/s and the measurement rate can achieve as high as 150 k samples/s

A Low-Cost Low-Power CMOS Time-to-Digital Converter Based on Pulse Stretching

A monolithic Vernier-based time-to-digital converter (TDC) with 375 ps time resolution and theoretically unlimited input range has been integrated in TSMC 035-mum standard 2P4M CMOS technology Since the proposed circuit utilizes a single-stage Vernier delay line (VDL) for both coarse and fine measurements, no other interpolation circuit is required The operation frequencies of the single-stage Vernier delay line are stabilized against process, voltage and temperature (PVT) variations by dual phase-locked loops The proposed TDC successfully eliminates the element mismatch, input range limitation, external bias adjustment and complicated calibration problems The measured differential nonlinearity is plusmn02 LSB, and the measured integral nonlinearity is plusmn035 LSB The power consumption is 150 mW at 100 k samples/s full conversion speed, and the chip size is as small as 0222 mm2 All the packaged chips were tested to be fully functional over -40degC to 100degC ambient temperature range and 30 V to 39 V supply voltage range with extremely low resolution variations

A PVT Insensitive Vernier-Based Time-to-Digital Converter With Extended Input Range and High Accuracy

In this paper, a precise cyclic CMOS time-to-digital converter (TDC) with low thermal sensitivity is proposed. Through compensation, the thermal sensitivity of the new cyclic time-to-digital converter is reduced dramatically. The proposed TDC not only possesses reduced thermal sensitivity but also has a small chip size. The circuit was fabricated with TSMC 0.35 /spl mu/m CMOS technology. The size of the circuit is only 0.40 mm by 0.30 mm. The experimental results show that a /spl plusmn/6% resolution variation of the new TDC was achieved over 0/spl deg/C to 100/spl deg/C temperature range which is much better than the /spl plusmn/25% resolution variation of the original uncompensated version. The effective resolution is as fine as 57.3ps/LSB at room temperature with a fluctuation of /spl plusmn/3.5 ps over 0/spl deg/C to 100/spl deg/C temperature range, and the corresponding integral nonlinearities are all within /spl plusmn/0.8 LSB. The minimum measurement rate is 33 kHz. The measured power consumption is about 3.5 uW.

Chun-Chi Chen

Papers

A time-to-digital-converter-based CMOS smart temperature sensor

A time-to-digital-converter-based CMOS smart temperature sensor

A Low-Cost Low-Power CMOS Time-to-Digital Converter Based on Pulse Stretching

A PVT Insensitive Vernier-Based Time-to-Digital Converter With Extended Input Range and High Accuracy

A precise cyclic CMOS time-to-digital converter with low thermal sensitivity