Multiple logic devices are presently under study within the Nanoelectronic Research Initiative (NRI) to carry the development of integrated circuits beyond the complementary metal-oxide-semiconductor (CMOS) roadmap. Structure and operational principles of these devices are described. Theories used for benchmarking these devices are overviewed, and a general methodology is described for consistent estimates of the circuit area, switching time, and energy. The results of the comparison of the NRI logic devices using these benchmarks are presented.

Overview of Beyond-CMOS Devices and a Uniform Methodology for Their Benchmarking

Fascinating characteristics of halide perovskites (HPs), which cannot be seen in conventional semiconductors and metal oxides, have boosted the application of HPs in electronic devices beyond optoelectronics such as solar cells, photodetectors, and light-emitting diodes. Here, recent advances in HP-based memory and logic devices such as resistive-switching memories (i.e., resistive random access memory (RRAM) or memristors), transistors, and artificial synapses are reviewed, focusing on inherently exotic properties of HPs: i) tunable bandgap, ii) facile majority carrier control, iii) fast ion migration, and iv) superflexibility. Various fabrication techniques of HP thin films from solution-based methods to vacuum processes are introduced. Up-to-date work in the field, emphasizing the compositional flexibility of HPs, suggest that HPs are promising candidates for next-generation electronic devices. Taking advantages of their unique electrical properties, low-cost and low-temperature synthesis, and compositional and mechanical flexibility, HPs have enormous potential to provide a new platform for future electronic devices and explosively intensive studies will pave the way in finding new HP materials beyond conventional silicon-based semiconductors to keep up with "More-than-Moore" times.

Organic–Inorganic Hybrid Halide Perovskites for Memories, Transistors, and Artificial Synapses

Integration of graphene field-effect transistors (GFETs) requires the ability to grow or deposit high-quality, ultrathin dielectric insulators on graphene to modulate the channel potential. Here, we study a novel and facile approach based on atomic layer deposition through ozone functionalization to deposit high-κ dielectrics (such as Al2O3) without breaking vacuum. The underlying mechanisms of functionalization have been studied theoretically using ab initio calculations and experimentally using in situ monitoring of transport properties. It is found that ozone molecules are physisorbed on the surface of graphene, which act as nucleation sites for dielectric deposition. The physisorbed ozone molecules eventually react with the metal precursor, trimethylaluminum to form Al2O3. Additionally, we successfully demonstrate the performance of dual-gated GFETs with Al2O3 of sub-5 nm physical thickness as a gate dielectric. Back-gated GFETs with mobilities of ∼19 000 cm2/(V·s) are also achieved after Al2O3 deposi...

Atomic layer deposition of dielectrics on graphene using reversibly physisorbed ozone.

In the last decade, as semiconductor industry was approaching the end of the exponential Moore’s roadmap for device downscaling, the necessity of finding new candidate materials has forced many research groups to explore many different types of non-conventional materials. Among them, graphene, CNTs and organic conductors are the most successful alternatives. Finding a material with metallic properties combined with field effect characteristics on nanoscale level has been always a dream to continue the ever-shrinking road of the nanoelectronics. Due to its fantastic features such as high mobility, optical transparency, room temperature quantum Hall effect, mechanical stiffness, etc. the atomically thin carbon layer, graphene, has attracted the industry’s attention not only in the micro-, nano-, and opto-electronics but also in biotechnology. This paper reviews the basics and previous works on graphene technology and its developments. Compatibility of this material with Si processing technology is its crucial characteristic for mass production. This study also reviews the physical and electrical properties of graphene as a building block for other carbon allotropes. Different growth methods and a wide range of graphene’s applications will be discussed and compared. A brief comparison on the performance result of different types of devices has also been presented. Until now, the main focus of research has been on the background physics and its application in electronic devices. But, according to the recent works on its applications in photonics and optoelectronics, where it benefits from the combination of its unique optical and electronic properties, even without a bandgap, this material enables ultrawide-band tunability. Here in this article we review different applications and graphene’s advantages and drawbacks will be mentioned to conclude at the end.

Graphene synthesis, characterization and its applications in nanophotonics, nanoelectronics, and nanosensing

Nanoelectronics comprises a variety of devices whose electrical properties are more complex as compared to CMOS, thus enabling new computational paradigms. The potentially large space for innovation has to be explored in the search for technologies that can support large-scale and high-performance circuit design. Within this space, we analyze a set of emerging technologies characterized by a similar computational abstraction at the design level, i.e., a binary comparator or a majority voter. We demonstrate that new logic synthesis techniques, natively supporting this abstraction, are the technology enablers. We describe models and data-structures for logic design using emerging technologies and we show results of applying new synthesis algorithms and tools. We conclude that new logic synthesis methods are required to both evaluate emerging technologies and to achieve the best results in terms of area, power and performance.

New Logic Synthesis as Nanotechnology Enabler

In this paper, we introduce a novel reconfigurable graphene logic based on graphene p-n junctions. In this logic device, switching is accomplished by using co-planar split gates that modulate the properties that are unique to graphene, including ambipolar conduction, electrostatic doping, and angular dependent carrier reflection. In addition, the use of these control gates can dynamically change the operation of the device, leading to reconfigurable multi-functional logic. A device model is derived from carrier transmission probability across the p-n junction for allowing quantitative comparison to CMOS logic. Based on this model, we show that the proposed graphene logic has significant advantages over CMOS gate in terms of delay-power product and signal restoration, while maintaining a similar footprint. Furthermore, the device utilizes a large graphene sheet with minimal patterning, allowing feasible integration with CMOS circuits, for potential CMOS-graphene hybrid circuits.

Chun Yung Sung

Papers

Reconfigurable multi-function logic based on graphene P-N junctions