The present invention relates to a multilayer, balanced-unbalanced signal transformer ( 20 ) comprising a first coil and a second coil providing at least one balanced signal port at one side of the balun transformer and an unbalanced signal port at another side of the balun transformer. The (at least one) balanced signal port is provided by a first balanced signal terminal ( 23 b ) and a second balanced signal terminal ( 24 b ) formed by the ends of the first coil. The unbalanced (single-ended) signal port is provided by a first unbalanced signal terminal ( 21 u ) and a second unbalanced signal terminal ( 22 u ). It comprises a discrete component formed on a low resistivity, e.g. semiconductor substrate layer, and the first and second coils are formed in, or constitute, a first and a second metal layer such that at least a portion of one of the coils is disposed in a metal layer, or constitute a portion of a metal layer, above the metal layer in which at least a portion of the other coil is disposed, or which is constituted, at least partly, by a portion of the other coil, wherein between said first and second metal layer and between said second metal layer and the substrate layer, first and second dielectric layers are disposed. Each of said first and second coils comprises three or less winding turns.

A multilayer balun transformer structure

Frequency translation circuits are key elements in communication systems. This paper presents a frequency tripler for 38-GHz short-range communication systems, designed using a pseudomorphic high electron-mobility field-effect transistor (pHEMT) technology. The successful first iteration monolithic microwave integrated circuit achieved a state-of-the-art output power of 3.1 dBm and a minimum conversion loss of 3.4 dB. The multiplier exhibits a conversion efficiency of 11% and average phase noise degradation at 10 and 100 kHz offset frequency from carrier of 9/spl plusmn/1 dB. Through a comprehensive study of the frequency multiplier, we demonstrate the optimum performance achieved under a class B mode of operation. To our knowledge, this is the first reported Ka-band single-stage frequency tripler based on pHEMT technology that has been fully characterized for phase noise degradation.

A high-efficiency and low-phase-noise 38-GHz pHEMT MMIC tripler

Microwave and RF frequency multipliers are employed in a large number of communications, radar, civilian, and military systems. This paper presents the development of active doublers operating in S and C frequency bands. These devices are unique in that high electron-mobility transistors (Fujitsu FHX35LG) are employed in an unbalanced configuration utilizing "reflector" networks simultaneously on the input and output to reflect the second harmonic signal into the gate of the device and the fundamental signal into the drain simultaneously at appropriate phase angles to optimize performance. Measured and simulated results are presented on over 20 multiplier designs to verify the design philosophy. Conversion gains of approximately 7 dB are presented for narrow-band designs (5% bandwidth), 5 dB for medium-bandwidth designs (15%), and 4 dB for wide-bandwidth designs (35%). The fundamental and third harmonic rejection is approximately 40 dBc for the narrow-band designs and greater than 50 dBc for the medium and wide-band designs.

Single-ended HEMT multiplier design using reflector networks

Two methods for reconfigurable transmitters using frequency multipliers in conjunction with digital predistortion linearizers are developed. One method utilizes a circuit topology that can be switched between a fundamental-mode in-phase combined amplifier, and a push-push frequency doubler using input phasing. Investigation to maximize output harmonics out of regular power amplifiers (PAs) was performed, and the implementation of the device was successful for the amplifier- and doubler-mode operation. To satisfy optimal load-line conditions for the operation in both modes, a bi-tuned output-combining technique is introduced as well. Measurement results indicate that the circuit is able to transmit 28 dBm of output power at 900 MHz in the amplifier mode, and 22 dBm at 1800 MHz in the doubler mode. In combination with predistortion linearization, the reconfigurable transmitter was shown to be capable of amplifying IS-95B code-division multiple-access (CDMA) signals with an adjacent-channel power ratio (ACPR) up to -58dBc/30kHz. The second suggested method utilizes a fundamental-frequency PA followed by a varactor multiplier that can be bypassed with an RF switch. A varactor-diode doubler with a saturated conversion loss of 1.3 dB was built and tested. Using predistortion linearization techniques on both the PA and doubler, an ACPR of -53dBc/30kHz at 885-kHz offset was achieved for a CDMA signal transmitted at 1850 MHz.

Dual-band transmitters using digitally predistorted frequency multipliers for reconfigurable radios

An analog frequency doubler is developed using GaAs HBT MMIC technology. In this doubler circuit, a novel push-push circuit configuration is used to provide the efficient frequency conversion and the fundamental frequency rejection over a broad bandwidth. The measurement results of the MMIC demonstrate an average 0 to 3 dB conversion gain and a 10 dB rejection on fundamental frequency up to 14 GHz. Thus, this MMIC can be used as a low-cost insertion block to achieve any stable local-oscillation signals up to X-band by multiplying the high quality VCOs at low frequencies, especially the inexpensive Si BJT based VCOs at wireless frequencies.

A DC to X-band frequency doubler using GaAs HBT MMIC

A primary factor affecting optimum performance of microwave multipliers employing nonlinear devices is the proper termination of the fundamental and other harmonic frequency components. The objective of this paper is to present a quantitative analysis leading to the assessment of optimum terminating impedances in the design of active frequency multipliers with special attention given to harmonics other than those desired. The analysis includes computer modeled HEMT data and supporting measured data for corresponding circuit realizations. Circuit designs are presented utilizing HEMT transistors as the active element to verify modeled results. Based on available literature, the results demonstrate, for the first time, the quantitative effects of harmonic termination on active multiplier conversion gain and fundamental and higher harmonic suppression. An experimental design reveals an improvement in multiplier gain of 124% over the conventional approach and data is presented which quantitatively illustrates the advantages of impedance termination considerations under optimal bias conditions.

Optimization of active microwave frequency multiplier performance utilizing harmonic terminating impedances

A primary factor affecting optimum performance of microwave multipliers employing nonlinear devices is the proper termination of the fundamental and other harmonic frequency components. The objective of this paper is to present a quantitative analysis leading to the assessment of optimum terminating impedances in the design of active frequency multipliers. The analysis includes computer modelled HEMT data and supporting measured data for corresponding circuit realizations. An experimental design reveals an improvement in multiplier gain of 77% over the conventional approach.

This paper details the development of novel power-divider T junction circuits which have unique prescribed transmission characteristics. Subsequent to a description of the design technique, the paper describes experimental results obtained on a series of fabricated circuit designs. These circuits were fabricated on microstrip material having a relative dielectric of 2.17, and substrate thickness of 20 mils. The measured results are shown to compare well with computer simulations over a frequency range from 50 MHz to 8 GHz.

Design of microstrip T junction power divider circuits for enhanced performance

An extremely important component in the realization of certain RF and microwave system topologies is the high frequency balun network. In addition to its application in radiating structures, it has broad utility in numerous wireless communication system topologies. This paper describes a small and compact coupled microstrip line design for use primarily in the exploding portable wireless market. The main advantage of the design to be discussed is that its size is considerably smaller than traditional planar circuit realizations. Size reduction is achieved by utilizing the property of effective length enhancement of a transmission line by employing additive capactive effects. The design technique is illustrated by presentation of computed and measured data on a /spl sim/0.9 GHz realization developed for wireless applications.

http://ieeexplore.ieee.org/iel4/3744/10942/00504492.pdf

A reduced size planar balun structure for wireless microwave and RF applications

The sections in this article are


1
Applications of Frequency Multipliers

2
Passive Frequency Multipliers

3
Active Frequency Multipliers

D.G. Thomas

Papers

Optimization of active microwave frequency multiplier performance utilizing harmonic terminating impedances

Optimization of active microwave frequency multiplier performance utilizing harmonic terminating impedances

Design of microstrip T junction power divider circuits for enhanced performance

A reduced size planar balun structure for wireless microwave and RF applications

Radio-Frequency Multipliers