D
Daniel W. Bailey
Researcher at Advanced Micro Devices
Publications - 14
Citations - 83
Daniel W. Bailey is an academic researcher from Advanced Micro Devices. The author has contributed to research in topics: Clock domain crossing & Clock signal. The author has an hindex of 6, co-authored 14 publications receiving 83 citations.
Papers
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Patent
Asymmetric precharged flip flop
TL;DR: In this article, a flip-flop circuit includes a differential stage coupled to a latch stage, and the differential stage comprises cross-coupled dynamic logic and only provides a single output to the latch stage.
Patent
Techniques for integrated circuit clock management using pulse skipping
TL;DR: In this paper, a processor (400) includes a clock source ( 402), a central processing unit (CPU) ( 408), and a clock generator ( 404 ). And the clock generator provides the CPU clock signal using periodic pulse skipping such that the clock signal has a number of transitions over a unit of time corresponding to the output frequency.
Patent
Compound logic flip-flop having a plurality of input stages
TL;DR: In this paper, a compound logic flip-flop with a plurality of input stages coupled to receive at least one input signal and a clock signal is presented. But it is not shown that the output stage can be configured to logically combine the results of the input logic functions.
Patent
Techniques for integrated circuit clock signal manipulation to facilitate functional and speed test
TL;DR: In this article, an integrated circuit (1600) includes a debug module (1602 ) and a clock generator (1610 ), where the debug module is configured to receive a test pattern and provide a mode signal based on the test pattern.
Patent
Variable-width power gating module
TL;DR: In this article, the first subset of transistors to couple the primary voltage rail to the secondary voltage rail was shown to be less than all of the transistors in the plurality.