David A. Hodges

TL;DR: The design of a fully-integrated NMOS analog sampled-data recursive bandpass filter is described and experimental results for the critical elements and for partially integrated feasibility models in both metal-gate and silicon-gate NMOS technologies are discussed.

TL;DR: This paper presents a specification of SPUR and the results of some early architectural experiments, which include a large virtually-tagged cache, address translation without a translation buffer, LISP support with datatype tags but without microcode, multiple cache consistency in hardware, and an IEEE floating-point coprocessor without micro code.

TL;DR: In this article, the effects of various additional factors on the accuracy of self-calibrating A/D converters were analyzed, such as charge injection from certain transistor switches, error in the capacitor in the correction path, voltage coefficient of precision-ratioed capacitors, and noise.

TL;DR: Voltage swing reduction and constant current steering techniques for high-speed CMOS crosspoint switches were described in this paper, which reduced crosstalk and intersymbol interference originating from capacitive and inductive couplings along the high speed channels, and achieved a worst-case data rate of 250 Mbit/s with 80% eye opening and 0.2-ns timing jitter from a 5V supply.

TL;DR: In this article, the authors study the manufacturing performance of semiconductor wafer fabrication plants in the US, Asia, and Europe, and find that important quantitative indicators of productivity, including defect density (yield), major equipment production rates, wafer throughput time, and effective new process introduction to manufacturing, vary by factors of 3 to as much as 5 across an international sample of 28 fabs.