This article presents an efficient digital polar transmitter (DPTX) at mm-wave frequencies that exploit a novel <inline-formula> <tex-math notation="LaTeX">$N$ </tex-math></inline-formula>-way series Doherty combiner (SDC) to enhance its drain and system efficiency at deep power back-off (PBO). The proposed <inline-formula> <tex-math notation="LaTeX">$N$ </tex-math></inline-formula>-way SDC is scalable and can be implemented elegantly using <inline-formula> <tex-math notation="LaTeX">$N$ </tex-math></inline-formula> transformers and <inline-formula> <tex-math notation="LaTeX">$N-1$ </tex-math></inline-formula> shunt capacitors. As a proof of concept, a four-way Doherty DPTX is realized with the proposed SDC in which four identical but independent digital phase modulators deliver a phase-modulated constant envelope signal to their corresponding digital power amplifiers to perform the required amplitude modulation. Fabricated in a 40nm CMOS process, the proposed DPTX occupies a core area of 1.1 <inline-formula> <tex-math notation="LaTeX">$\mathrm {mm^{2}}$ </tex-math></inline-formula> and exhibits 18.7dBm saturated output power and <−40dBc LO feedthrough. It demonstrates a drain efficiency of 33%/36%/22% at 0/4.5/11.5dB PBO at a 29.5GHz carrier frequency. While transmitting a 300MHz 64-QAM OFDM signal with a peak-to-average power ratio of 10.7dB, the DPTX achieves 18%/8% average drain/system efficiency, −27.6dB error vector magnitude, and −27.5dBc adjacent channel leakage ratio. To the best of our knowledge, this work is the first reported mm-wave Doherty transmitter that includes the entire chain all the way from the binary data stream up to the modulated mm-wave output signal.

A Four-Way Series Doherty Digital Polar Transmitter at mm-Wave Frequencies

This article presents a $Ka$ -band bidirectional transceiver front end and its integration in an image-reject up/down converter module in 28-nm bulk CMOS. In the radio frequency (RF) front end, a transformer-based transmit/receive (T/R) switch is exploited for minimum area occupation without affecting the linearity and the isolation between the transmitter (TX) and receiver (RX) paths. The TX front end shows 19-dB power gain with an output-referred ${\mathrm{ OP}}_{\mathrm{ 1\,dB}}$ of 14 dBm and 18.7% power-added efficiency (PAE). Tested with a 100-MHz 64-QAM orthogonal frequency-division multiplexing (OFDM) modulated input signal, the error vector magnitude (EVM) is below 5% up to an average output power of 6.6 dBm, with a corresponding 7% PAE. The RX in the front end features a minimum noise figure (NF) of 4.9 dB, with 17-dB power gain. The measured input IP3 is –9.2 dBm, while the power consumption is only 35 mW. The RF bandwidth is 22–31 GHz, wide enough to cover the fifth-generation (5G) new radio (NR) bands n257, n258, and n261. The RF front end is also monolithically integrated along with a broadband bidirectional frequency up/down converter, capable of translating the 5G modulated signal from/to a 3-GHz intermediate frequency (IF). The up/down converter is realized with a single bidirectional quadrature mixer shared between the TX and RX paths. At the IF, a single hybrid coupler is used for quadrature phase shifting in upconversion and recombination in downconversion while concurrently keeping the TX and RX IF paths isolated from each other. In the upconversion mode, the module features a 22-dB programmable conversion gain, with a 40-dB minimum in-band image rejection ratio (IRR). The downconversion path shows a 29-dB programmable conversion gain and a minimum measured NF and IRR of 8.5 and 30 dB, respectively, while consuming 110 mW.

A Broadband 22–31-GHz Bidirectional Image-Reject Up/Down Converter Module in 28-nm CMOS for 5G Communications

A primary advantage of antenna arrays is their spatial selectivity, which has been widely utilized to support various applications, such as beam-steering, blocker rejection, massive multi-in--multi-out (MIMO), targeting communication, radar, and imaging. In this article, we exploit and engineer this spatial selectivity in an MIMO array for directionally secured wireless communication. We propose constellation decomposition array (CDA) and spatial carrier aggregation (SCA) schemes to achieve high throughput keyless physical layer security using antenna arrays. In CDA, lower order quadratic-amplitude modulation (QAM) signals are fed into an MIMO array and are spatially combined in the target direction to realize desired higher order QAM signals but distort the modulation in unintended directions. In SCA, we feed different carriers to different elements in an MIMO array to perform spectral carrier aggregation spatially. In addition, we adopt temporal swapping to further enhance security by creating one-to-many symbol mapping in unintended directions. The concept is demonstrated on an eight-channel MIMO transmitter (TX) fabricated in 45-nm CMOS silicon on insulator (SOI) and on-board antenna array for over-the-air (OTA) measurements. Using four channels of the TX array in the CDA mode, an information beamwidth of 5°/10° is realized by spatially constructing a single carrier 64QAM signal using three QPSK signals or one QPSK signal plus one 16QAM signal with a total 64QAM data rate up to 3 Gb/s. Using SCA with two carriers of 64QAM signals and temporal swapping, an rms error vector magnitude (EVM) of 6.3% at broadside with an aggregated data rate of 1.2 Gb/s is achieved, in contrast to greatly distorted rms EVM of 10% at only 4° angle.

A 25–34-GHz Eight-Element MIMO Transmitter for Keyless High Throughput Directionally Secure Communication

Mm-wave 5G communication seeks to support multi-Gb/s data-rates over its large available spectrum, particularly in the K/Ka bands (24 to 40GHz). To ensure sufficient link budget under mm-wave path losses, array-based systems are required. However, element coupling in practical antenna arrays varies each antenna load from its ideal <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$50\Omega$</tex> impedance (i.e., VSWR = 1). Power amplifiers (PAs) govern the overall transmitter (Tx) performance yet are the most susceptible blocks to VSWR variation, as they interface directly with antennas. The antenna VSWR alters the PA load, degrading the PA linearity, efficiency, output power, and reliability. Multiple proposed reconfigurable PAs maintain the PA performance under VSWR but require VSWR resilient built-in-self-test (BiST), particularly on-chip power and impedance sensors, to determine the PA operation/reconfiguration. Previous work on power detectors is primarily based on voltage sensing, which only tracks the true RF power for a fixed and known real load. The works in [1] and [2] detect both load current and voltage to measure the real RF power over VSWR. However, both only properly operate for differential PAs, while most mm-wave front-end/antenna interfaces require single-ended connections. Meanwhile, reported impedance detectors consist of either an equivalent passive series element or shunt element with large capacitive loading [3]–[5]. These designs inevitably add loss, limit the PA output-matching-network (OMN) bandwidth (BW), and change the OMN impedance transformation. The authors of [6] demonstrate VSWR-resilient joint power-and-impedance sensing at mm-wave but only at a single frequency. To overcome these issues, we demonstrate a single-ended broadband VSWR-resilient joint true-power/impedance sensor. While the proposed sensor is realized with and without an integrated PA on a Wilkinson power combiner (WPC) under both small- and large-signal CW operation, it can be applied on any single-ended RF/mm-wave signal trace and is agnostic to PA designs. 

A Broadband Mm-Wave VSWR-Resilient Joint True-Power Detector and Impedance Sensor Supporting Single-Ended Antenna Interfaces

Due to the exponential growth of data communications, linearity specification is deteriorating and, in high frequency systems, impedance transformation leading to power delivering from power amplifiers (PAs) to antennas is becoming an increasingly important concept. Intelligent-based optimization methods can be a suitable solution for enhancing this characteristic in the transceiver systems. Herein, to tackle the problems of linearity and impedance transformations, deep neural network (DNN)-based optimizations are employed. In the first phase, the antenna is modeled through the DNN with using the long short-term memory (LSTM) leading to forecast the load impedances in the a wide frequency band. Afterwards, the PA is modeled and optimized through another LSTM-based DNN using Multivariate Newton’s Method where the optimal drain impedances are predicted from the first DNN (i.e., modeled antenna). The whole optimization methodology is executed automatically leading to enhance linearity specification of the whole system. For proving the novelty of the proposed method, monolithic microwave integrated circuit (MMIC) along with the multiple-input multiple-output (MIMO) antenna is designed, modeled, and optimized concurrently in the frequency band from 7.49 GHz to 12.44 GHz. The proposed method leads to enhancing the linearity of the transceiver in an effective way where DNN-based PA model gives rise to a solution for achieving the most optimal drain impedance through the modeled DNN-based antenna.

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Directly Matching an MMIC Amplifier Integrated with MIMO Antenna through DNNs for Future Networks

This article presents a wideband millimeter-wave (mmWave) receiver front-end that covers the frequency range from 43 to 97 GHz, supporting the operation in the major parts of the V-, E-, and W-bands. The front-end incorporates a passive mixer-first topology to achieve high linearity and wideband performance. The front-end adopts I/Q generation at the RF port, using a coupled-line coupler (CLC), rather than at the local oscillator (LO) port to mitigate the crosstalk of the overlapping I/Q LO signals especially present at high frequencies. The CLC at the RF input facilitates ultrawide band input matching. The front-end implements the multi-gate gm3 cancellation technique at the IF amplifiers to preserve the linearity and provide gain at the IF section. Image rejection capabilities using a current mode transformer-based IF 90° coupler are implemented on chip and demonstrated with measurements. The front-end prototype is fabricated on the GlobalFoundries 22-nm FD-SOI CMOS process and it demonstrates an ultra-wideband performance across the frequency range 43–97 GHz (2.25:1 bandwidth) with image rejection of up to 32 dB, IIP3 of 1.6–5.2 dBm, and gain of 15 dB. The implementation used is low-IF topology with 3.8-GHz IF frequency and 1-GHz bandwidth. Furthermore, the measurement results show that the front-end supports high-speed modulated signals of up to 6-Gbps 64QAM modulation data.

A 43–97-GHz Mixer-First Front-End With Quadrature Input Matching and On-Chip Image Rejection

The mm-wave spectrum is opening a new opportunity for TRx systems to operate at high-Gb/s data-rates. However, this opportunity is also imposing stringent requirements for power amplifiers (PAs) in terms of efficiency and linearity. To this date, all PA designs focus on increasing the peak/power-back-off (PBO) PAE and output power $(max \mathrm{P}_{out})$ by either presenting multi-harmonic terminations or improving on existing topologies, such as stacked, outphasing, and Doherty PAs [1 –3]. However, in highly scaled silicon processes with low supply voltages, these reported techniques see diminishing returns on PAE and $\mathrm{P}_{out}$ since the transistor knee voltage $(\mathrm{V}_{knee})$ becomes a significant portion of the supply voltage [5]. Moreover, an extra reduction in supply voltage is often performed in practical deployment to ensure device reliability. This is especially relevant for mm-wave array operations, where array element couplings result in substantial antenna impedance mismatches and undesired large PA voltage swings [6]. Although the reported techniques have improved overall PA efficiency at mm-wave, fundamentally they are incapable of surpassing the theoretical PA core efficiency at the same conduction angle (e.g., Class-B common-source (CS) PA) without resorting to device switching, or harmonic shaping.

26.3 A mm-Wave Power Amplifier for 5G Communication Using a Dual-Drive Topology Exhibiting a Maximum PAE of 50% and Maximum DE of 60% at 30GHz

This letter presents the design of a coupler-based VSWR-resilient mm-wave joint impedance/true-power detector integrated together with a wideband power amplifier (PA) in a 45-nm CMOS SOI process At 38 GHz, the sensor measures the antenna impedance for up-to 3:1 VSWR with a maximum $\vert \Gamma \vert $ and $\angle \Gamma $ error of 0238° and 289°, respectively The coupler network also measures the real power delivered to the standard 50- $\Omega $ antenna load with an error within ±05 dB for a 16-dB dynamic range, as well as sensing the real power delivered to a complex antenna load (up-to 3:1 VSWR) with less than ±335-dB error The PA testbed has a 3-dB bandwidth of 375% (26–38 GHz) and OP1dB bandwidth of 363% (27–39 GHz) The PA achieves a peak Psat of 1729 dBm, OP1 dB of 1633 dBm, and peak PAE of 2977% at 37 GHz The PA with a sensor occupies an area of $131\times136$ mm2, while the sensor takes an area of $047\times0971$ mm2 This work enables future built-in-self-testing (BiST) and in situ machine learning-based rapid performance optimization of mm-wave transmitter (TX) elements or TX arrays with element couplings

A Single-Ended Coupler-Based VSWR Resilient Joint mm-Wave True Power Detector and Impedance Sensor

We propose using machine learning models for the direct synthesis of on-chip electromagnetic (EM) passive structures to enable rapid or even automated designs and optimizations of RF/mm-Wave circuits. As a proof of concept, we demonstrate the direct synthesis of a 1:1 transformer on a 45nm SOI process using our proposed neural network model. Using pre-existing transformer s-parameter files and their geometric design training samples, the model predicts target geometric designs.

David Munzer

Papers

A 43–97-GHz Mixer-First Front-End With Quadrature Input Matching and On-Chip Image Rejection

26.3 A mm-Wave Power Amplifier for 5G Communication Using a Dual-Drive Topology Exhibiting a Maximum PAE of 50% and Maximum DE of 60% at 30GHz

A Single-Ended Coupler-Based VSWR Resilient Joint mm-Wave True Power Detector and Impedance Sensor

Residual Network Based Direct Synthesis of EM Structures: A Study on One-to-One Transformers

Residual Network Based Direct Synthesis of EM Structures: A Study on One-to-One Transformers