E
Eddy C. Huang
Researcher at Actel
Publications - 9
Citations - 618
Eddy C. Huang is an academic researcher from Actel. The author has contributed to research in topics: Gate array & Field-programmable gate array. The author has an hindex of 8, co-authored 9 publications receiving 618 citations.
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Patent
Tileable field-programmable gate array architecture
TL;DR: In this paper, a plurality of FGs are arranged in rows and columns with each FG being configured to receive tertiary and regular input signals, perform a logic operation, and generate regular output signals.
Patent
Integrated circuit that includes a field-programmable gate array and a hard gate array having the same underlying structure
TL;DR: In this paper, the authors present an integrated circuit (IC) consisting of both a field-programmable gate array (FPGA) and a hard array (HA) with an underlying logic structure and memory cells.
Patent
Method and apparatus of memory clearing with monitoring RAM memory cells in a field programmable gated array
Chung Sun,Eddy C. Huang +1 more
TL;DR: In this article, a field-programmable gate array (FPGA) has an array of RAM memory cells comprising at least one row of memory cells, each RAM cell is coupled to a row driver line.
Patent
Routing structures for a tileable field-programmable gate array architecture
TL;DR: In this article, the first FPGA tile, comprising a plurality of functional groups (FGs), a regular routing structure, and interface groups (IGs), is described.
Patent
Final design method of a programmable logic device that is based on an initial design that consists of a partial underlying physical template
TL;DR: In this article, a method of making an integrated circuit (IC) includes establishing an initial design for a field-programmable gate array (FPGA) to be included in the IC that includes programmable connections that can be programmed to implement a desired function.