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Showing papers by "Erdal Oruklu published in 2016"


Proceedings ArticleDOI
01 Sep 2016
TL;DR: Experimental results show that flaws can be detected even in signals with very low signal to noise ratio, compared to other regression methods such as Support Vector Regression, HMM performs better and requires less effort and A-scan data for training.
Abstract: In this work, modeling of a stochastic non stationary process is used to detect flaw echoes in ultrasonic NDE signals. This research aims at locating the flaw (if any) present in the NDE signal using Hidden Markov Model (HMM). HMM works on the principle that any non-stationary stochastic signals are generated by a hidden process which can be approximated by a Markov Model. The states present in the Hidden Markov Model are unknown and may vary according to the application. For ultrasonic flaw detection application, three states were assumed to model low level noise, high level noise and the flaw. Discrete Wavelet Transform (DWT) was chosen as feature input to HMM. Experimental results show that flaws can be detected even in signals with very low signal to noise ratio. Compared to other regression methods such as Support Vector Regression, HMM performs better and requires less effort and A-scan data for training.

8 citations


Proceedings ArticleDOI
01 Sep 2016
TL;DR: The implementation of the SVM based flaw detection algorithm on an embedded hardware platform based on ARM CPU cores and a graphics processing unit (GPU) aims to achieve real time operation.
Abstract: Support vector machine (SVM) based classifiers can be used to predict the presence and location of flaw echoes in Ultrasonic NDE signals with high accuracy. In this work, we present the implementation of the SVM based flaw detection algorithm on an embedded hardware platform (Tegra TK1 board) based on ARM CPU cores and a graphics processing unit (GPU). This implementation exploits high level of parallelism inherent in the algorithm and aims to achieve real time operation. Performance evaluation is done by comparing the embedded GPU against a PC setup with an Intel CPU and a discrete GPU unit. Overall, classification algorithm can be executed under 2ms with this embedded platform, potentially enabling real-time ultrasonic NDE applications.

5 citations


Proceedings ArticleDOI
19 May 2016
TL;DR: An artificial pancreas (AP) system, implemented on a mobile device that integrates hardware and software components via smartphone that is running a dedicated Operating System designed for AP systems is described.
Abstract: In this work, an artificial pancreas (AP) system, implemented on a mobile device is described. The proposed AP platform integrates hardware (insulin pump, glucose monitor, various sensors for vital signs and physical activities) and software (closed-loop control algorithm, sensor fusion, data storage and remote server access) components via smartphone that is running a dedicated Operating System designed for AP systems. Interfacing with this OS and custom application development steps are presented. Closed loop operation is demonstrated with case studies.

3 citations


Proceedings Article
01 Oct 2016
TL;DR: A standardized development framework on an Android device supporting multiple sensors is introduced in order to facilitate a multi-variable closed-loop AP algorithm and offers a conservative model for communication losses.
Abstract: This paper describes the communication challenges associated with implementation of a multi-sensor artificial pancreas system on a smartphone device and presents solutions for potential communication losses. In particular, a standardized development framework on an Android device supporting multiple sensors is introduced in order to facilitate a multi-variable closed-loop AP algorithm. Package losses and communication link errors pose major challenges for the AP systems to overcome. The proposed solution offers a conservative model, wherein the controller application on the host smartphone requests status updates, resending of packages if necessary, and ultimately, warnings are issued to the user when data cannot be recovered.

2 citations


Proceedings ArticleDOI
19 May 2016
TL;DR: Performance of Predictive Technology Model (PTM) and BSIM-CMG models are investigated, and leakage reduction techniques are applied to adder circuit designs in order to minimize static power.
Abstract: Due to its reduced leakage and suppressed short channel effects, FinFET has been adopted by semiconductor industry to replace conventional bulk CMOS on most advanced process nodes. In this paper, performance of Predictive Technology Model (PTM) and BSIM-CMG models are investigated, and leakage reduction techniques are applied to adder circuit designs in order to minimize static power. HSPICE simulation results confirm significant leakage reduction with negligible performance penalty when power gating and zig-zag selection of sleep transistors are used simultaneously.