E
Eric Sprangle
Researcher at Intel
Publications - 24
Citations - 1820
Eric Sprangle is an academic researcher from Intel. The author has contributed to research in topics: Cache pollution & Cache. The author has an hindex of 12, co-authored 24 publications receiving 1805 citations.
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Patent
Method and apparatus for utilizing multiple opportunity ports in a processor pipeline
TL;DR: In this article, a method and apparatus for a microprocessor with multiple memory read opportunity ports in a pipeline is described, where a spacer may be introduced into the pipeline, permitting the use of a second opportunity port to read its second operand from the register file at a later time.
Patent
Partition-free multi-socket memory system architecture
TL;DR: In this paper, a technique to increase memory bandwidth for throughput applications is presented, without increasing interconnect trace or pin count by pipelining pages between one or more memory storage areas on half cycles of a memory access clock.
Patent
Device, system, and method for improving processing efficiency by collectively applying operations
TL;DR: In this paper, a system and method for generating a single compressed vector including two or more predetermined attribute values is described, where if a first and a second attribute value of the data point are equal to a first or a second, respectively, of the two predetermined attribute value, the compressed vector is used to operate on the data points.
Patent
Technique for scheduling threads
Grochowski Ed,Eric Sprangle,Ganapathy Krishna,Chan Chung,Jay Lawlor,Carmean Doug,Forsyth Tom,Michael Abrash +7 more
TL;DR: In this paper, a pre-fetch buffer bank is used to store a plurality of instructions concerning respective threads, and the instruction fetched about each thread is transmitted to a multiplexer (mux) via interconnects T0, T1, T2, T3.
Patent
Mechanism for effectively handling texture sampling
TL;DR: In this article, a method and apparatus for efficiently handling texture sampling is described, where a compiler or other software is capable of breaking a texture sampling operation for a pixel into a pre-fetch operation and a use operation.