Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices, and models that contrast the pervasive von Neumann computer architecture This biologically inspired approach has created highly connected synthetic neurons and synapses that can be used to model neuroscience theories as well as solve challenging machine learning problems The promise of the technology is to create a brain-like ability to learn and adapt, but the technical challenges are significant, starting with an accurate neuroscience model of how the brain works, to finding materials and engineering breakthroughs to build devices to support these models, to creating a programming framework so the systems can learn, to creating applications with brain-like capabilities In this work, we provide a comprehensive survey of the research and motivations for neuromorphic computing over its history We begin with a 35-year review of the motivations and drivers of neuromorphic computing, then look at the major research areas of the field, which we define as neuro-inspired models, algorithms and learning approaches, hardware and devices, supporting systems, and finally applications We conclude with a broad discussion on the major research topics that need to be addressed in the coming years to see the promise of neuromorphic computing fulfilled The goals of this work are to provide an exhaustive review of the research conducted in neuromorphic computing since the inception of the term, and to motivate further work by illuminating gaps in the field where new research is needed

A Survey of Neuromorphic Computing and Neural Networks in Hardware.

FPGA implementation of a systems identification module based upon Hopfield networks

Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programming efficiency of such systems. In field-programmable computing machines, a conventional fixed transactional memory becomes inefficient use of the silicon. We propose configurable transactional memory (CTM) as a mechanism to implement application specific synchronization that utilizes the field-programmability of such devices to match with the requirements of an application. The proposed configurable transactional memory is targeted at embedded applications and is area efficient compared to conventional schemes that are implemented with cache-coherent protocols. In particular, the CTM is designed to be incorporated in to compilation and synthesis paths of either high-level languages or during system creation process using tools such as Xilinx EDK. We study the impact of deploying a CTM in a packet metering and statistics application and two micro-benchmarks as compared to a lock-based synchronization scheme. We have implemented this application in a Xilinx Virtex4 device and found that the CTM was 0-73% better than a fine-grained lock-based scheme.

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Configurable Transactional Memory

We propose a method for estimating nonlinear interdependences between time series using cellular nonlinear networks Our approach is based on the nonlinear dynamics of interacting nonlinear elements We apply it to time series of coupled nonlinear model systems and to electroencephalographic time series from an epilepsy patient, and we show that an accurate approximation of symmetric and asymmetric realizations of a nonlinear interdependence measure can be achieved, thus allowing one to detect the strength and direction of couplings

Estimating nonlinear interdependences in dynamical systems using cellular nonlinear networks.

A retinomorphic architecture based on discrete-time cellular neural networks using reconfigurable computing

A new approach to Cellular Neural Networks discrete model is proposed. This approach is focused on CNN implementation on reconfigurable hardware architectures and DSP microprocessors. CNN are analysed from the perspective of Systems Theory, giving rise to an alternative model to those found in the literature available. Dynamic equations and their solutions, stability analysis and real-time implementation architecture are described in this paper as the most relevant points in the development of our model. The main results, obtained from different simulations, evidence the usefulness and functionality of the model.

New emulated discrete model of CNN architecture for FPGA and DSP applications

When image and video processing applications are moving towards consumer markets, there exists clearly the need of replacing PC-based software solutions with embedded processor. In this context, the enhanced characteristics of the modern FPGA devices make possible to build whole systems with improved performance and reduced costs. In this paper we describe a platform for developing fully FPGA-based embedded systems designed for image and video processing applications. It is a hardware/software system which makes the design process easier and faster. It also makes feasible the interaction with the user and the run-time customization of processing algorithms.

FPGA-Based Platform for Image and Video Processing Embedded Systems

In the last decade, skin color has proven to be a useful cue for recognition and tracking of face and hand, and skin color segmentation has become the first step in several processing tasks. With the aim of overcoming the weak points that existing software solutions show in real time mobile applications, we propose an FPGA-based implementation of a skin classifier. The skin classification algorithm and its hardware architecture are herein described. Results in terms of classification performance, processing rate and hardware resources used are presented.

F.J. Toledo

Papers

New emulated discrete model of CNN architecture for FPGA and DSP applications

FPGA-Based Platform for Image and Video Processing Embedded Systems

Skin Color Detection for Real Time Mobile Applications