The conventional mesa isolation process in AlGaAs/InGaAs heterostructure FETs results in the gate contacting the exposed highly doped region at the mesa sidewalls, forming a parasitic gate leakage path. In this work, we suppress the gate leakage from the mesa-sidewall and enhance microwave power performance by performing an additional second mesa etching. The device gate leakage characteristics under high-input power swing are particularly investigated to reveal an improvement in device linearity, which is sensitive to the sidewall gate leakage. This modified device (M-HFETs) provides not only a higher linear RF output power but also a lower IM3 product than those characteristics in conventional HFETs.

Improved device linearity of AlGaAs/InGaAs HFETs by a second mesa etching

BCl CHF gas mixture for reactive ion etching process was used to the gate-recess of fabricat- ing (Al Ga ) In P quaternary heterostructure double doped-channel FET's (D-DCFET), where a high uniformity of was achieved. With the merits of this wide bandgap (Al Ga ) In P layer, microwave power performance of this heterostructure D-DCFET demonstrates a compatible perfor- mance for devices fabricated on AlGaAs/InGaAs heterostructures. Index Terms—AlGaInP/InGaAs, heterostructure FETs, reac- tive-ion-etching.

http://ieeexplore.ieee.org/iel5/55/19783/00915602.pdf

Feng-Tso Chien

Papers

RIE Gate-Recessed (Al Ga ) In P/InGaAs Double Doped-Channel FETs Using CHF BCl Mixing Plasma