An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

Photovoltaic devices using GaAs nanopillar radial p–n junctions are demonstrated by means of catalyst-free selective-area metal–organic chemical vapor deposition. Dense, large-area, lithographically defined vertical arrays of nanowires with uniform spacing and dimensions allow for power conversion efficiencies for this material system of 2.54% (AM 1.5 G) and high rectification ratio of 213 (at ±1 V). The absence of metal catalyst contamination results in leakage currents of ∼236 nA at −1 V. High-resolution scanning photocurrent microscopy measurements reveal the independent functioning of each nanowire in the array with an individual peak photocurrent of ∼1 nA at 544 nm. External quantum efficiency shows that the photocarrier extraction highly depends on the degenerately doped transparent contact oxide. Two different top electrode schemes are adopted and characterized in terms of Hall, sheet resistance, and optical transmittance measurements.

Patterned radial GaAs nanopillar solar cells.

A 60-GHz active microstrip antenna design comprising a three-stage pseudomorphic high electron mobility transistor amplifier integrated with a high gain antenna on an alumina substrate is presented. The amplifier has 18-dB gain and is ribbon bonded to the substrate on which the antenna is defined. The antenna is a microstrip array antenna with a simple etched pattern for producibility at high frequencies. Two antenna layouts are designed, for different coverage areas: a single array having 13.4-dBi directivity and a double array with 14.6-dBi directivity. Antenna losses are approximately 1-2 dB, giving antenna gains of about 12 and 13 dBi, respectively. Mechanical simplicity is achieved with this design, and unnecessary transitions are avoided. Measurements are performed on amplifier and antenna separately, as well as on the integrated design. Amplifier chips with and without benzocyclobutene passivation are fabricated and measured for comparison.

High gain active microstrip antenna for 60-GHz WLAN/WPAN applications

A 60-GHz active microstrip antenna design comprising a three-stage pseudomorphic high electron mobility transistor amplifier integrated with a high gain antenna on an alumina substrate is presented. The amplifier has 18-dB gain and is ribbon bonded to the substrate on which the antenna is defined. The antenna is a microstrip array antenna with a simple etched pattern for producibility at high frequencies. Two antenna layouts are designed, for different coverage areas: a single array having 13.4-dBi directivity and a double array with 14.6-dBi directivity. Antenna losses are approximately 1-2 dB, giving antenna gains of about 12 and 13 dBi, respectively. Mechanical simplicity is achieved with this design, and unnecessary transitions are avoided. Measurements are performed on amplifier and antenna separately, as well as on the integrated design. Amplifier chips with and without benzocyclobutene passivation are fabricated and measured for comparison

Device linearity and intermodulation distortion comparison of dual material gate and conventional AlGaN/GaN high electron mobility transistor

The conventional mesa isolation process in AlGaAs/InGaAs heterostructure FETs results in the gate contacting the exposed highly doped region at the mesa sidewalls, forming a parasitic gate leakage path. In this work, we suppress the gate leakage from the mesa-sidewall and enhance microwave power performance by performing an additional second mesa etching. The device gate leakage characteristics under high-input power swing are particularly investigated to reveal an improvement in device linearity, which is sensitive to the sidewall gate leakage. This modified device (M-HFETs) provides not only a higher linear RF output power but also a lower IM3 product than those characteristics in conventional HFETs.

Improved device linearity of AlGaAs/InGaAs HFETs by a second mesa etching

Surface passivation technology plays an important role, especially in E-mode pHEMTs applications, and a new passivation technology has been proposed in this study This novel benzocyclobutene (BCB) passivation layer takes advantage of the low dielectric permittivity (27) and a low loss tangent (00008) In this letter, we not only suppress the gate-to-drain leakage current but also improve the device power performance under a high input power swing by using a BCB passivation layer The passivated 10 /spl mu/m-long gate pHEMTs exhibit a better off-state performance than the unpassivated ones The maximum output power under a 24-GHz operation is 118 mW/mm, with a linear power gain of 111 dB and a power-added efficiency is 60%

Enhanced power performance of enhancement-mode Al/sub 0.5/Ga/sub 0.5/As/In/sub 0.15/Ga/sub 0.85/As pHEMTs using a low-k BCB passivation

High-power and high-efficiency GaAs heterostructure field-effect transistors (FETs) are attracting tremendous attention in RF power amplifier applications. However, thermal effects can be an important issue in RF power devices, owing to the huge amount of heat generated during their operation. In this paper, the temperature-dependent characteristics of Al/sub 0.3/Ga/sub 0.7/As/In/sub 0.15/Ga/sub 0.85/ As doped-channel FETs (DCFETs) are investigated and compared with conventional pseudomorphic-HEMTs (pHEMTs) devices, in terms of their dc, microwave and RF power performance at temperatures ranging from room temperature to 150/spl deg/C. Due to conducting carriers being less influenced by temperature and the better Schottky diode characteristics that can be obtained in DCFETs, the intrinsic device parameters and output performance remain almost constant at high temperatures, which also results in better device reliability. The performance variation of DCFETs associated with temperatures from 25/spl deg/C to 150/spl deg/C all fall within a single digit, i.e., output power (P/sub out/, 16.2 dBm versus 15.8 dBm), power gain (G/sub p/, 16.6 dB versus 15.1 dB), power added efficiency (PAE, 34.2% versus 31.3%), which is not the case for conventional pHEMTs. Therefore, DC devices are very promising for microwave power device applications operating at high temperature.

AlGaAs/InGaAs heterostructure doped-channel FET's exhibiting good electrical performance at high temperatures

A double-recessed T-gate process has been successfully developed to fabricate 0.2-/spl mu/m gate-length heterostructure InGaP-InGaAs doped-channel FETs (DCFETs) to increase the gate-to-drain breakdown voltage. This technology uses direct electron-beam lithography with a single exposure of a four-layer stack polymethylmethacrylate and polydimethylmethacrylate (photoresists). After the combination of chemical and dry etchings, the double gate-recessed DCFETs exhibit improved DC and RF power performance, as compared with the conventional ones, resulting from the gate-leakage current. The Schottky gate breakdown voltage enhances from 5 to 7 V, and the output power increases from 148 to 288 mW/mm at 5.2 GHz.

A novel double-recessed 0.2-μm T-gate process for heterostructure InGaP-InGaAs doped-channel FET fabrication

A novel low-k benzocyclobutene (BCB) bridged and passivated layer for AlGaAs/InGaAs doped-channel power field effect transistors (FETs) with high reliability and linearity has been developed and characterized. In this study, we applied a low-k BCB-bridged interlayer to replace the conventional air-bridged process and the SiN/sub x/ passivation technology of the 1 mm-wide power device fabrication. This novel and easy technique demonstrates a low power gain degradation under a high input power swing, and exhibits an improved adjacent channel power ratio (ACPR) than those of the air-bridged one, due to its lower gate leakage current. The power gain degradation ratio of BCB-bridged devices under a high input power operation (P/sub in/ = 5 /spl sim/ 10 dBm) is 0.51 dB/dBm, and this value is 0.65 dB/dBm of the conventional air-bridged device. Furthermore, this novel technology has been qualified by using the 85-85 industrial specification (temperature = 85 C, humidity = 85%) for 500 h. These results demonstrate a robust doped-channel HFET power device with a BCB passivation and bridged technology of future power device applications.

Shih-Cheng Yang

Papers

Improved device linearity of AlGaAs/InGaAs HFETs by a second mesa etching

Enhanced power performance of enhancement-mode Al/sub 0.5/Ga/sub 0.5/As/In/sub 0.15/Ga/sub 0.85/As pHEMTs using a low-k BCB passivation

AlGaAs/InGaAs heterostructure doped-channel FET's exhibiting good electrical performance at high temperatures

A novel double-recessed 0.2-μm T-gate process for heterostructure InGaP-InGaAs doped-channel FET fabrication

High performance BCB-bridged AlGaAs/InGaAs power HFETs