F
Francesco Quaglia
Researcher at University of Rome Tor Vergata
Publications - 188
Citations - 2125
Francesco Quaglia is an academic researcher from University of Rome Tor Vergata. The author has contributed to research in topics: Discrete event simulation & Rollback. The author has an hindex of 23, co-authored 181 publications receiving 2000 citations. Previous affiliations of Francesco Quaglia include Sapienza University of Rome.
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Consistent Checkpointing in Distributed Databases: Towards a Formal Approach
TL;DR: This paper answers the question of data checkpointing by providing a necessary and sufficient condition suited for database systems and establishes a bridge between the data object/transaction model and the process/message-passing model.
Posted Content
A Wait-free Multi-word Atomic (1,N) Register for Large-scale Data Sharing on Multi-core Machines
TL;DR: The Anonymous Readers Counting (ARC) register as discussed by the authors enables large-scale data sharing by admitting up to $2^{32}-2$ concurrent readers on off-the-shelf 64-bits machines.
Proceedings ArticleDOI
Fast Computation of Hyper-exponential Approximations of the Response Time Distribution of MMPP/M/1 Queues
TL;DR: This paper shows how fast the computation can be supported in practical settings by ad-hoc techniques allowing the hyper-exponential model to be solved with no iterative or numerical costly steps, which would otherwise be required in order to compute the length of transient phases due to state switches in the MMPP arrival process.
Journal ArticleDOI
Mutable locks: Combining the best of spin and sleep locks
Romolo Marotta,Davide Tiriticco,Pierangelo Di Sanzo,Alessandro Pellegrini,Bruno Ciciani,Francesco Quaglia +5 more
TL;DR: In this article, the authors present mutable locks, a synchronization construct with the same execution semantics of traditional locks (such as spin locks or sleep locks), but with a self-tuned optimized trade off between responsiveness and CPU-time usage during threads' wait phases.
Proceedings ArticleDOI
Prompt application-transparent transaction revalidation in software transactional memory
Simone Economo,Emiliano Silvestri,Pierangelo Di Sanzo,Alessandro Pellegrini,Francesco Quaglia +4 more
TL;DR: An STM architecture that, thanks to a lightweight operating system support, is able to perform a fine-grain periodic revalidation of running transactions, and has been integrated with the open source TinySTM package.