The present invention describes a system and method for communicating voice and data over a packet-switched network that is adapted to coexist and communicate with a legacy PSTN. The system permits packet switching of voice calls and data calls through a data network from and to any of a LEC, a customer facility or a direct IP connection on the data network. The system includes soft switch sites, gateway sites, a data network, a provisioning component, a network event component and a network management component. The system interfaces with customer facilities (e.g., a PBX), carrier facilities (e.g., a LEC) and legacy signaling networks (e.g., SS7) to handle calls between any combination of on-network and off-network callers. The soft switch sites provide the core call processing for the voice network architecture. The soft switch sites manage the gateway sites in a preferred embodiment, using a protocol such as the Internet Protocol Device Control (IPDC) protocol to request the set-up and tear-down of calls. The gateway sites originate and terminate calls between calling parties and called parties through the data network. The gateway sites include network access devices to provide access to network resources. The data network connects one or more of the soft switch sites to one or more of the gateway sites. The provisioning and network event component collects call events recorded at the soft switch sites. The network management component includes a network operations center (NOC) for centralized network management.

Voice over data telecommunications network architecture

A method for partitioning physical transmission resources of a physical network is provided. At first, a set of logical networks is established on top of the physical network. The logical networks comprise nodes and logical links extending between the nodes so as to form the logical networks. The logical links are used by routes. Next, the capacities of the logical links of the logical networks are determined such that the route blocking probability on each individual route in each one of the logical networks is less than or equal to a maximum allowed blocking probability, given for each individual route. This is realized by distributing, for each individual route, the route blocking evenly among the logical links used by the individual route. Finally, the physical transmission resources are allocated among the logical links of the logical networks according to the determination. In addition, a device for partitioning physical transmission resources of a physical network is also disclosed.

A method and device for partitioning physical netword resources

Buffer management schemes are needed to fairly regulate the sharing of memory among different output port queues in a shared memory ATM switch. Of the conventional schemes, static threshold is simple but does not adapt to changing traffic conditions while pushout is efficient and adaptive but difficult to implement. We propose a novel scheme called dynamic threshold which combines the simplicity of static threshold and the adaptability of pushout. The key idea is that the maximum permissible length, for any individual queue at any instant of time, is proportional to the unused buffering in the switch. A queue whose length equals or exceeds the current threshold value may accept no more new cells. The dynamic threshold procedure presented improves the fairness and switch efficiency by guaranteeing access to the buffer space for all output queues. Computer simulation is used to compare the loss performance of the dynamic threshold technique with that of static threshold and pushout. The dynamic threshold scheme is shown to be a good compromise: while nearly as simple as static threshold control, it offers most of the performance benefits of pushout. Like pushout, the dynamic threshold method is adaptive, so it is more robust to uncertainties and changes in traffic conditions than, static threshold control.

Dynamic queue length thresholds in a shared memory ATM switch

The symmetric self-electrooptic-effect device (S-SEED), a structure consisting of two p-i-n diodes electrically connected in series and acting as an optically bistable set-reset latch, is discussed. Applications and extensions of this device are also discussed. The devices do not require the critical biasing that is common to most optically bistable devices and thus is more useful for system applications. They have been optically cascaded in a photonic ring counter and have been used to perform different NOR, OR, NAND, and AND logic functions. Using the same device, a differential modulator that generates a set of complementary output beams with a single voltage control lead and a differential detector that gives an output voltage dependent on the ratio of the two optical input powers have been demonstrated. >

Symmetric self-electrooptic effect device : optical set-reset latch, defferential logic gate and differential modulator/detector

A method and apparatus for coupling a plurality of channels of a communications network to a node. The node includes a plurality of ports, each adapted for connection to a corresponding channel and a system interface adapted for connection to a plurality of node clients in the form of host computers, peripheral devices, network interfaces, etc. The node includes a receiver and transmitter dedicated to each port and common circuitry for controlling and processing frames received and/or transmitted by the plurality of ports. A frame prioritization circuit forwards frames received by a selected port to a frame handler for processing and a frame routing circuit routes frames processed by the frame handler to at least one of the ports associated with at least one destination node. The node further includes a frame header buffer associated with each port for temporarily storing the header of each frame received by the respective port prior to forwarding of the header to the frame handler.

Method and apparatus for reordering frames

One of the more promising interconnection schemes proposed for use in photonic switching networks is the crossover interconnection network; however, reported implementations of the crossover have been limited in size and complexity. A large-scale cascadable implementation of the optical crossover network that capitalizes on planar symmetric self electrooptic effect device (S-SEED) arrays is discussed. A fully functional experimental prototype with 32 inputs and 32 outputs that was operated at a maximum rate of 55.7 kb/s is also discussed. It is also shown that S-SEED arrays can be operated as simple two-input two-output nodes (called 2-modules) within a controllable network. >

An all-optical implementation of a 3-D crossover switching network

A two-stage, rearrangeable multiconnection switching network for connecting N1 input channels (IC1-IC25) to n2 output channels (OC1-OC5). The network comprises a number of first stage switches (101-110) and a second stage switch (191), e.g., rectangular arrays. The second stage switch has n2 outlets each connected to one of the n2 output channels. A connection arrangement (140) connects each of the first stage switch inlets to an associated predetermined input channel such that for any group of n2 of the input channels, there is a group of n2 of the first stage switches each having one inlet connected to a different one of that group of n2 of the input channels. The approach is easily extendible to switching networks serving any larger number, N2, of output channels by adding second stage switches and connecting each additional second stage switch to each first stage switch. In larger networks, the first and second stage switches are themselves replaceable by two-stage networks in accordance with the invention.

Rearrangeable multiconnection switching networks

A switching network where a large class of combinatorial designs which are well known in the mathematical literature are for the first time applied to advantageously define the pattern of permanent connections effected between network input channels and initial network crosspoints, illustratively by a connection arrangement of a two-stage, rearrangeable network. The class of combinatorial designs comprises designs of three types: (1) block designs, (2) orthogonal arrays, and (3) difference sets. Each of these is used in a unique manner to derive an advantageous pattern of permanent connections.

Rearrangeable multiconnection switching networks constructed using combinatorial designs

A multi-stage network which achieves the same overall connectivity as known networks but where individual switching nodes have no input selectivity and no output selectivity. Each node is enabled or disabled to control communication therethrough in response to a single control signal. The functionality of a switching network is achieved by controlling which nodes are enabled rather than specifying connections of particular node inputs and outputs to be effected by the nodes. In a photonic network embodiment, each network node is implemented using a single symmetric self electro-optic effect device (S-SEED).

Space-division switching network having reduced functionality nodes

A network control arrangement where stage-specific busy/idle information is stored using individual memories for each stage, and path hunting is effected by combining the busy/idle information for all stages concurrently rather than sequentially. A single binary number, comprising a concatenation of an inlet number, a path number and an outlet number, uniquely identifies a particular network path between a given inlet and outlet. The stage busy/idle information for the path components, e.g., network nodes or links, for all network path between the given inlet and outlet is stored at a single address of a stage memory. The memory address for a particular stage is a specified subset of the bits of the inlet and outlet numbers. The memories for all stages are read concurrently to simultaneously determine all idle paths and, after a path is selected, all stage memories are concurrently updated. Stage-specific subsets of the bits of the binary number comprising the concatenation of the inlet and outlet numbers with the path number associated with the selected path are used to access all components of that path to enable communication.

Gaylord W. Richards

Papers

An all-optical implementation of a 3-D crossover switching network

Rearrangeable multiconnection switching networks

Rearrangeable multiconnection switching networks constructed using combinatorial designs

Space-division switching network having reduced functionality nodes

Concurrent multi-stage network control arrangement