Medium-voltage (MV) silicon carbide (SiC) devices have opened up new areas of applications which were previously dominated by silicon-based IGBTs From the perspective of a power converter design, the development of MV SiC devices eliminates the need for series connected architectures, control of multilevel converter topologies which are necessary for MV applications, and the inherent reliability issues associated with it However, when SiC devices are used in these applications, they are exposed to a high peak stress (5–10 kV) and a very high $dv/dt$ (10–100 kV/ $\mu$ s) Using these devices calls for a gate driver with a dc–dc isolation stage that has ultralow coupling capacitance in addition to be able to withstand the high isolation voltage This paper presents a new MV gate driver design to address these issues while maintaining a minimal footprint for the gate driver An MV isolation transformer is designed with a low interwinding capacitance, while maintaining the clearance, creepage, as well as insulation standards A dc isolation test has been performed to validate the integrity of the insulating material The key features include low input common mode current, and a short-circuit protection scheme specifically designed for 10 kV SiC mosfet s The performance of the gate driver is evaluated using double pulse tests and continuous tests Experimental results validate the advantages of the gate driver and its application for MV SiC devices exhibiting very high $dv/dt$  The proposed gate driver concept is aimed at providing an efficient and reliable method to drive MV SiC devices

Design Considerations and Development of an Innovative Gate Driver for Medium-Voltage Power Devices With High $dv/dt$

High-performance gate drive power supply (GDPS) plays a crucial role in ensuring the reliability and safety of the gate driver for power semiconductor devices. This article focuses on the design of a high-voltage-insulated GDPS for the 10-kV silicon carbide MOSFET in medium-voltage (MV) application. Design considerations, including insulation scheme, high-voltage-insulated transformer design, and load voltage regulation scheme, are proposed. In addition, the performance of the secondary-side-regulated (SSR) GDPS and that of the primary-side-regulated (PSR) GDPS are compared for several aspects, including interwinding capacitance, load voltage regulation rate, conversion efficiency, and hardware complexity. Finally, an SSR GDPS and a PSR GDPS, with an insulation voltage of 20 kV, are built in the lab. The test results demonstrate that the PSR GDPS is more preferable because of lower interwinding capacitance, lower load voltage regulation rate, higher conversion efficiency, and simpler control circuit.

Design Considerations for High-Voltage Insulated Gate Drive Power Supply for 10-kV SiC MOSFET Applied in Medium-Voltage Converter

This article presents the design and optimization of a suitable topology for an isolated dc–dc auxiliary power supply with high isolation voltage and low coupling capacitance. The converter consists of a GaN HEMT inverter operating at 6.78 MHz, an LCC resonance tank, and a class-E low d v /d t rectifier. Furthermore, the galvanic isolation is implemented using a coreless planar transformer that enables higher insulation voltage with similar or better converter efficiency compared to designs using a magnetic material. An analytical design methodology is developed, however, SPICE investigations show that optimal designs might lie outside the validity of the design equations. Consequently, a virtual prototyping tool is developed based on a genetic algorithm with numerical simulations, and in turn, is used to optimize the converter. The optimization algorithm maximizes the converter efficiency while minimizing the transformer size. Prototypes are constructed based on the resulting Pareto front. Experimental results show the validity of the simulated results. Prototypes transferring power up to 15 W with a peak efficiency of 81% are shown. The selected topology enables insulating voltages exceeding 40 kV and coupling capacitances below 10 pF.

/pdf/optimized-design-of-multi-mhz-frequency-isolated-auxiliary-1mqvon80j2.pdf

Optimized Design of Multi-MHz Frequency Isolated Auxiliary Power Supply for Gate Drivers in Medium-Voltage Converters

For high power medium voltage (MV) grid connected applications LCL filter proves to be an attractive solution to filter out the current harmonics when compared to $L$ or LC filters. The inductance requirement reduces drastically to meet the same Total Harmonic Distortion (THD) standards for grid connections for LC L filters compared to $L$ filter which makes the system dynamics much faster. The increasing use of Silicon Carbide (SiC) based power devices for MV applications has made the effects of the parasitic elements in the filter more prominent, due to the high dv / dt experienced by the passive filter elements during device switching transients. This paper addresses the issues associated with the high dv / dt experienced by the LC L filters for SiC-based MV applications. In order to study these effects, the parasitic elements of the inductor are modeled and analyzed. A suitable solution is proposed to improve the overall system performance. The effect of high dv / dt on the filter and the effectiveness of the proposed solution are validated using simulation. Experimental data is also provided to validate the proposed concept.

Practical Design Considerations for MV LCL Filter Under High dv/dt Conditions Considering the Effects of Parasitic Elements

A conventional transformer can withstand multiple electrical, mechanical and thermal faults which enables it to have a long lifetime. However, its inability to control the power flow through it has led researchers to look for alternate options such as the solid-state transformers. With the Silicon Carbide (SiC) semiconductor devices, it is now possible to go to high switching frequencies in medium voltage applications, which helps in reducing the overall size and weight of the transformer. The advent of medium voltage (MV) SiC devices has enabled the use of simple two-level and three-level topologies for medium voltage power transfer. This paper discusses a basic power topology for a medium voltage mobile utilities support equipment based solid state transformer (MUSE-SST) with the new 10 kV SiC MOS-FETs. A design of the MUSE-SST is presented followed by some of the practical considerations that needs to be taken, including gate driver design and heat sink configurations. Simulation results for a 100 kW, MV MUSE SST system is presented. Experimental results are provided validating the operation of these 10 kV devices in double pulse tests, buck and boost operation. This research helps in providing an overview regarding the usage of the 10 kV SiC devices in grid-interconnection and also discusses various challenges that comes along with it.

Design of a Medium Voltage Mobile Utilities Support Equipment based Solid State Transformer (MUSE-SST) with 10 kV SiC MOSFETs for Grid Interconnection

Single switch capable of blocking 10 kV and higher voltages are presently being developed and demand improved gate drivers for their functioning. Induction based gate drivers have been the foremost solutions in this regard. Design challenges that have been outlined for these drivers are low coupling capacitance, strong magnetic coupling and smaller dimensions with isolation not considered in depth. In this paper, first isolation requirements and its physical realization guidelines are provided from IEC 61800-5-1 for electric drives application. Based on study, two system insulation designs: single and double PCB are derived for lower MV and higher MV system respectively. Current loop gate driver with double PCB design is found to be practical and economical solution for higher MV power electronics systems. Afterwards, shortcomings of three state of art induction solutions at both system and magnetic link level is discussed. Improved transformers with primary MV cable providing mandatory solid insulation are fabricated. It is shown through impedance measurements that the cable has negative effect on the magnetizing inductance and coupling capacitance compared to state of art transformer solution. At the end, both set of transformers are tested with 64 kV impulse and 32 kV overvoltage with only improved transformers showing positive results.

Ghanshyam Gohil

Papers

Isolation design considerations for power supply of medium voltage silicon carbide gate drivers