Power systems for modern complementary metal-oxide-semiconductor (CMOS) technology are becoming harder to design. One design methodology is to identify a target impedance to be met across a broad frequency range and specify components to meet that impedance. The impedance versus frequency profiles of the power distribution system components including the voltage regulator module, bulk decoupling capacitors and high frequency ceramic capacitors are defined and reduced to simulation program with integrated circuit emphasis (SPICE) models. A sufficient number of capacitors are placed in parallel to meet the target impedance. Ceramic capacitor equivalent series resistance (ESR) and ESL are extremely important parameters in determining how many capacitors are required. SPICE models are then analyzed in the time domain to find the response to load transients.

Power distribution system design methodology and capacitor selection for modern CMOS technology

Applications of Moats, Voltage Regulator Modules and Decoupling Capacitors to Suppress Delta-I Noise

This paper presents a method for power integrity (PI) issue by using the isolation island and decoupling capacitors (de-caps). Deferent form the papers discussed before, the location of voltage regulator module (VRM) is taken into account. Without the de-caps, the fundamental resonant frequency is due to the two-dimensional cavity formed by power plan ground plane and VRM which can deteriorate the whole system. It can be shown that at the lower frequency, delta-I noise can be suppressed by VRM, but at the higher frequency, de-caps should be added to maintain the PI. Isolation island is used to help reducing the number of de-caps. The effects of different stick-ups are also discussed in this paper.

Guo-Chiang Hung

Papers

The isolation island and the displacement of decoupling capacitors for power integrity issues