Showing papers by "Hans Norström published in 2009"
Patent•
15 Apr 2009
TL;DR: In this paper, the authors proposed a hybrid wafer with a hybrid-oriented surface layer on a high thermal conductivity layer (10), where the hybrid oriented layer comprises at least a first single-crystal SixGei-x layer (15) and a second single-cyanelized SixGeis-X layer (117), optionally with an intermediate layer (21) having a thickness of between 1 nanometer and 1 micrometer and comprising at least one amorphous or polycrystalline SixGeI-x layers.
Abstract: The present invention provides a hybrid wafer with a hybrid-oriented surface layer on a high thermal conductivity layer (10). The hybrid-oriented layer comprises at least a first single-crystal SixGei-x layer (15) and a second single-crystal SixGei-x layer (117), optionally with an intermediate layer (21) having a thickness of between 1 nanometer and 1 micrometer and comprising at least one amorphous or polycrystalline SixGei-x layer. Thanks to the invention it is possible to integrate components made from different materials, using combinations like, e.g., Si-GaAs, Si- GaN and Si-SiC, and p-MOS and n-MOS transistors on one single IC chip. Further it is possible to improve electrical and thermal performances of such hybrid circuits.
2 citations
06 Nov 2009
TL;DR: In this article, the first ever demonstration of LDMOS transistors on Sion-SiC hybrid substrates is presented, where the intermediate a-Si layer provides electrical advantages and does not form any thermal barriers.
Abstract: First ever demonstration of LDMOS transistors on Sion-SiC hybrid substrates. No degradation in transistor performance as compared to conventional SOI. Poly-SiC is available in larger wafer sizes but seems to have slightly lower heat conductivity than crystalline SiC. The intermediate a-Si layer provides electrical advantages and does not form any thermal barriers.
2 citations