H
Haris Siraj
Researcher at RMIT University
Publications - 7
Citations - 77
Haris Siraj is an academic researcher from RMIT University. The author has contributed to research in topics: Dual loop & Voltage regulator. The author has an hindex of 3, co-authored 7 publications receiving 36 citations. Previous affiliations of Haris Siraj include University of Management and Technology, Lahore & Lahore University of Management Sciences.
Papers
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Journal ArticleDOI
The role of unmanned aerial vehicles and mmWave in 5G: Recent advances and challenges
TL;DR: A consolidated synthesis on the role of UAVs and mmWave in 5G, emphasis on recent developments and challenges, and the scope of artificial intelligence and machine learning techniques as an efficient solution for combating the dynamic and complex nature of U AV‐based cellular communication networks are discussed.
Proceedings ArticleDOI
Modeling and control of a doubly fed induction generator for grid integrated wind turbine
TL;DR: In this paper, the authors presented the modeling, simulation and control of a grid connected doubly fed induction generator (DFIG) coupled with the wind turbine, and the proposed scheme is implemented in SIMULINK / MATLAB environment and the simulation results validate the efficacy of proposed scheme.
Proceedings ArticleDOI
Analytical Control System Synthesis for Dual-Loop Cascaded Stationary Frame Voltage Regulators
TL;DR: In this paper, a control system synthesis strategy for a voltage regulated voltage source inverter (VSI) incorporating digital linear feedback regulators in a cascaded dual-loop architecture is presented, which enables the voltage control loop bandwidth to be set at up to 2/3 times of the LC filter resonance frequency.
Proceedings ArticleDOI
Joint Optimization of AC/DC Conversion Loss and Battery Lifetime in Intermittent Power Systems
TL;DR: A storage based backup system for variable DC load in a dynamically priced intermittent AC grid is considered and a multiobjective optimization problem is formulated that simultaneously considers the minimization of converter power losses and maximization of battery lifetime along with the minimizations of overall grid energy cost.
Proceedings ArticleDOI
Analytical Controller Synthesis Techniques for Integral Dominant Dual-Loop Stationary Frame Voltage Regulators
TL;DR: In this paper, analytical synthesis relationships for cascaded dual-loop voltage regulated voltage source inverters (VSIs) incorporating second order inductive-capacitive (LC) filters with integral-dominant frequency response characteristics are presented.