From the Publisher:
This work covers all aspects of physical design. The book is a core reference for graduate students and CAD professionals. For students, concept and algorithms are presented in an intuitive manner. For CAD professionals, the material presents a balance of theory and practice. An extensive bibliography is provided which is useful for finding advanced material on a topic. At the end of each chapter, exercises are provided, which range in complexity from simple to research level.

Algorithms for VLSI Physical Design Automation

Please nd enclosed the result of my GA bibliography database query. For further information see 1]. I would be happy if you could send me other references that you perhaps manage to nd on the subject. It would be also a pleasure to include your contributions to the bibliography.

An Indexed Bibliography of Genetic Algorithms

When solving real-world problems, often the main task is to find a proper representation for the candidate solutions. Strings of elementary data types with standard genetic operators may tend to create infeasible individuals during the search because of the discrete and often constrained search space. This article introduces a generally applicable representation for 2D combinatorial placement and packing problems. Empirical results are presented for two constrained placement problems, the facility layout problem and the generation of VLSI macro-cell layouts. For multiobjective optimization problems, common approaches often deal with the different objectives in different phases and thus are unable to efficiently solve the global problem. Due to a tree structured genotype representation and hybrid, problem-specific operators, the proposed approach is able to deal with different constraints and objectives in one optimization step.

/pdf/hybrid-genetic-algorithms-for-constrained-placement-problems-2t0xpn2gie.pdf

Hybrid genetic algorithms for constrained placement problems

A new genetic algorithm for channel routing in the physical design process of VLSI circuits is presented. The algorithm is based on a problem-specific representation scheme and problem-specific genetic operators. The genetic encoding and our genetic operators are described in detail. The performance of the algorithm is tested on different benchmarks, and it is shown that the results obtained using the proposed algorithm are either qualitatively similar to or better than the best published results.

/pdf/a-genetic-algorithm-for-channel-routing-in-vlsi-circuits-3p55n9cman.pdf

A genetic algorithm for channel routing in vlsi circuits

In this paper, a layout synthesis tool for the design of analog integrated circuits (ICs) is presented. This tool offers great flexibility that allows analog circuit designers to bring their special design knowledge and experiences into the synthesis process to create high-quality analog circuit layouts. Different from conventional layout systems that are limited to the optimization of single devices, our layout generation tool attempts to optimize more complex modules. This tool includes a complete tool suite that covers the following three major analog physical designs stages. 1) Module Generation: designers can develop and maintain their own technology- and application-independent module generators for subcircuits using an in-house developed description language. 2) Placement: a two-stage placement technique, tailored for the analog placement design, is proposed. In particular, this placement algorithm features a novel genetic placement stage followed by a fast simulated reannealing scheme. 3) Routing: the minimum-Steiner-tree-based global routing is developed, and it is actually integrated into the placement procedure to improve reliability and routability of the placement solutions. Following the global routing, a compaction-based constructive detailed routing finally completes the interconnection of the entire layout. Several testing circuits have been applied to demonstrate the design efficiency and the effectiveness of this tool. Experimental results show that this new layout tool is capable of producing high quality layouts comparable to those manually done by layout experts but with much less design time

An automated design tool for analog layouts

https://web.eecs.umich.edu/~mazum/PAPERS-MAZUM/62_geneticmoduleplacement.pdf

Macro-cell and module placement by genetic adaptive search with bitmap-represented chromosome

We present a systolic array architecture to solve the problem of hypergraph partitioning. The architecture is based on a sophisticated search technique belonging to the class of genetic algorithms. A hypergraph is decomposed into a stream of fine grained, bit string data in which they are propagated into an array of locally connected processing elements. Although each processing element can handle only a few simple bit level Boolean operations, it is shown that the overall connected array forms a powerful hardware partitioning engine in which pipelining and parallelism are fully exploited. Three inner procedures in this GA based solution were parallelized, namely, the fitness evaluation, crossover and mutation operations. A time complexity analysis together with a brief logic block diagrams for the parallel architecture are presented. Simulated results indicated good speedup.

Heming Chan

Papers

Macro-cell and module placement by genetic adaptive search with bitmap-represented chromosome

A Systolic Architecture for High Speed Hypergraph Partitioning Using a Genetic Algorithm.

A Systolic Architecture for High Speed Hypergraph Partitioning Using a Genetic Algorithm