H
Heng-Da Cheng
Researcher at Utah State University
Publications - 237
Citations - 11404
Heng-Da Cheng is an academic researcher from Utah State University. The author has contributed to research in topics: Image segmentation & Fuzzy logic. The author has an hindex of 49, co-authored 234 publications receiving 10214 citations. Previous affiliations of Heng-Da Cheng include Halifax & Harbin Institute of Technology.
Papers
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Proceedings ArticleDOI
Articulated human pose tracking based on game theory
TL;DR: This paper proposes a novel game theory based method for tracking two dimensional articulated human poses in monocular video sequences using a new probability scheme of game theory to find optimal solutions of human poses.
Journal ArticleDOI
Tumor saliency estimation for breast ultrasound images via breast anatomy modeling.
TL;DR: Zhang et al. as discussed by the authors decompose breast ultrasound image into layers using Neutro-Connectedness, and then utilize the layers to generate the foreground and background maps; and finally propose a novel objective function to estimate the tumor saliency by integrating the foreground map, background map, adaptive center bias, and region-based correlation cues.
Journal ArticleDOI
A Novel Imbalanced Classification Method based on Decision Tree and Bagging
TL;DR: This paper proposes an optimization embedded bagging (OEBag) approach to increase the sensitivity by learning the complex distributions in the minority class more precisely and selectively learns the minority examples that are misclassified easily by referring to examples in out-of-bag.
Book ChapterDOI
Reversible Image Watermarking Based on Neural Network and Parity Property
TL;DR: Experimental results show that this novel image reversible watermarking is proposed based on neural network and parity property can obtain higher capacity and preserve good visual quality.
Proceedings ArticleDOI
Parallel VLSI-oriented algorithm and architecture for computing histogram of images
TL;DR: The essential parallelism and simplicity of the proposed algorithm make it easy to implement by using a VLSI array architecture, and each pixel only needs to perform addition and comparison, and communicate only with its immediate neighbor pixels during the entire computation period.