A method of making a thin film transistor comprises (a) solution depositing a dispersion comprising semiconducting metal oxide nanoparticles onto a substrate, (b) sintering the nanoparticles to form a semiconductor layer, and (c) optionally subjecting the resulting semiconductor layer to post-deposition processing.

Method for making electronic devices using metal oxide nanoparticles

Ultrathin films of single-walled carbon nanotubes (SWNTs) represent an attractive, emerging class of material, with properties that can approach the exceptional electrical, mechanical, and optical characteristics of individual SWNTs, in a format that, unlike isolated tubes, is readily suitable for scalable integration into devices. These features suggest the potential for realistic applications as conducting or semiconducting layers in diverse types of electronic, optoelectronic and sensor systems. This article reviews recent advances in assembly techniques for forming such films, modeling and experimental work that reveals their collective properties, and engineering aspects of implementation in sensors and in electronic devices and circuits with various levels of complexity. A concluding discussion provides some perspectives on possibilities for future work in fundamental and applied aspects.

http://www.ifc.dicp.ac.cn/library/cailiao/pdf1/11.pdf

Ultrathin Films of Single-Walled Carbon Nanotubes for Electronics and Sensors: A Review of Fundamental and Applied Aspects

Performance of deep-submicrometer very large scale integrated (VLSI) circuits is being increasingly dominated by the interconnects due to decreasing wire pitch and increasing die size. Additionally, heterogeneous integration of different technologies in one single chip is becoming increasingly desirable, for which planar (two-dimensional) ICs may not be suitable. This paper analyzes the limitations of the existing interconnect technologies and design methodologies and presents a novel three-dimensional (3-D) chip design strategy that exploits the vertical dimension to alleviate the interconnect related problems and to facilitate heterogeneous integration of technologies to realize a system-on-a-chip (SoC) design. A comprehensive analytical treatment of these 3-D ICs has been presented and it has been shown that by simply dividing a planar chip into separate blocks, each occurring a separate physical level interconnected by short and vertical interlayer interconnects (VILICs), significant improvement in performance and reduction in wire-limited chip area can be achieved, without the aid of any other circuit or design innovations. A scheme to optimize the interconnect distribution among different interconnect tiers is presented and the effect of transferring the repeaters to upper Si layers has been quantified in this analysis for a two-layer 3-D chip. Furthermore, one of the major concerns in 3-D ICs arising due to power dissipation problems has been analyzed and an analytical model has been presented to estimate the temperatures of the different active layers. It is demonstrated that advancement in heat sinking technology will be necessary in order to extract maximum performance from these chips. Implications of 3-D device architecture on several design issues have also been discussed with special attention to SoC design strategies. Finally some of the promising technologies for manufacturing 3-D ICs have been outlined.

/pdf/3-d-ics-a-novel-chip-design-for-improving-deep-submicrometer-6k9by1rs19.pdf

3-D ICs: a novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration

Flexible electronics offer a wide-variety of applications such as flexible circuits, flexible displays, flexible solar cells, skin-like pressure sensors, and conformable RFID tags. Carbon nanotubes (CNTs) are a promising material for flexible electronics, both as the channel material in field-effect transistors (FETs) and as transparent electrodes, due to their high intrinsic carrier mobility, conductivity, and mechanical flexibility. In this feature article, we review the recent progress of CNTs in flexible electronics by describing both the processing and the applications of CNT-based flexible devices. To employ CNTs as the channel material in FETs, single-walled carbon nanotubes (SWNTs) are used. There are generally two methods of depositing SWNTs on flexible substrates—transferring CVD-grown SWNTs or solution-depositing SWNTs. Since CVD-grown SWNTs can be highly aligned, they often outperform solution-processed SWNT films that are typically in the form of random network. However, solution-based SWNTs can be printed at a large-scale and at low-cost, rendering them more appropriate for manufacturing. In either case, the removal of metallic SWNTs in an effective and a scalable manner is critical, which must still be developed and optimized. Nevertheless, promising results demonstrating SWNT-based flexible circuits, displays, RF-devices, and biochemical sensors have been reported by various research groups, proving insight into the exciting possibilities of SWNT-based FETs. In using carbon nanotubes as transparent electrodes (TEs), two main strategies have been implemented to fabricate highly conductive, transparent, and mechanically compliant films—superaligned films of CNTs drawn from vertically grown CNT forests using the “dry-drawing” technique and the deposition or embedding of CNTs onto flexible or stretchable substrates. The main challenge for CNT based TEs is to fabricate films that are both highly conductive and transparent. These CNT based TEs have been used in stretchable and flexible pressure, strain, and chemical and biological sensors. In addition, they have also been used as the anode and cathode in flexible light emitting diodes, solar cells, and supercapacitors. In summary, there are a number of challenges yet to overcome to optimize the processing and performance of CNT-based flexible electronics; nonetheless, CNTs remain a highly suitable candidate for various flexible electronic applications in the near future.

A review of fabrication and applications of carbon nanotube film-based flexible electronics

Publisher Summary A refractive index can be increased by ion implantation by changes in density and structure, by the addition of high-polarizability impurity ions, by a reduction of the plasma effect that increases the index and that is most important in the wavelength region far from the energy gap, and by absorption changing in the index in the region of the gap, that is, via the Kramers–Kronig relation. This chapter discusses the optical properties of implanted semiconductors, electrooptic components formed by ion implantation, general principles that determine most luminescent systems, effects of implantation temperature, luminescence centers in LiF-Mg-Ti radiation dosimeters, and use of line spectra in defect studies. In the LiF system, the luminescence bands are broad, and if alternative versions of the same complex exist, they cannot be resolved from the spectra. The addition, by implantation, of ions with incomplete inner electron shells opens up new possibilities as the lattice distortions of the free-ion energy levels are strongly perturbed by the defects in the neighborhood of the ion.

Optical Effects of Ion Implantation

This paper is a review of the catalytic chemical vapor deposition (Cat-CVD) method and properties of silicon-based thin films, such as amorphous-silicon (a-Si), polycrystalline-silicon (p-Si) and silicon nitride (SiNx) films, prepared by the Cat-CVD method. In the Cat-CVD method, also known as the hot-wire CVD (HWCVD) method, deposition gases are decomposed by catalytic cracking reactions with a heated catalyzer placed near the substrates, so that films are deposited at low substrate temperatures around 300°C without any help from the plasma. After explaining the deposition system and deposition mechanism, the properties of Cat-CVD a-Si, p-Si and SiNx films are described and the results are compared with those obtained by the conventional plasma CVD (PCVD) method. The superiority of the Cat-CVD method over the PCVD method is demonstrated.

https://iopscience.iop.org/article/10.1143/JJAP.37.3175/pdf

Formation of Silicon-Based Thin Films Prepared by Catalytic Chemical Vapor Deposition (Cat-CVD) Method

This paper presents a theoretical analysis on the lateral spread of the distribution for implanted ions in amorphous targets. First, it is shown that the solutions of the second order differential equations concerning moments of the ranges are necessary and sufficient to estimate the lateral distribution, if the Gaussian distribution is assumed. The calculated results of , and the lateral spread are presented. Next, it is shown that the actual distribution function along the lateral direction is approximately expressed by the complementary error function at the window edge, in case when ions are implanted through the mask-window. The variation of the lateral spread with incident ion mass is also calculated. From these calculations, it is concluded that the lateral spread can not be neglected in the case of light ions such as B+ incident to Si.

https://iopscience.iop.org/article/10.1143/JJAP.11.134/pdf

Theoretical Considerations on Lateral Spread of Implanted Ions

A new method of producing high quality hydrogenated amorphous silicon (a-Si:H) films is presented. An SiH4. and H2 gas mixture is decomposed without using any plasmas or photochemical excitation, but using only thermal and catalytic reactions between deposition-gas and a heated tungsten catalyzer. Photoconductivity of films produced by this methodreaches 10-3 (Ωcm)-1 and photosensitivity exceeds 105 for illumination of AM-1 light of 100 mW/cm2.

https://iopscience.iop.org/article/10.1143/JJAP.25.L949/pdf

Catalytic Chemical Vapor Deposition (CTC–CVD) Method Producing High Quality Hydrogenated Amorphous Silicon

The absolute densities of H atoms produced in catalytic chemical vapor deposition (Cat-CVD or hot-wire CVD) processes were determined by employing two-photon laser-induced fluorescence and vacuum ultraviolet absorption techniques. The H-atom density in the gas phase increases exponentially with increases in the catalyzer temperature in the presence of pure H2. When the catalyzer temperature was 2200 K, the absolute density in the presence of 5.6 Pa of H2 (150 sccm in flow rate) was as high as 1.5×1014 cm−3 at a point 10 cm from the catalyzer. This density is one or two orders of magnitude higher than those observed in typical plasma-enhanced chemical vapor-deposition processes. The H-atom density decreases sharply with the addition of SiH4. When 0.1 Pa of SiH4 was added, the steady-state density decreased to 7×1012 cm−3. This sharp decrease can primarily be ascribed to the loss processes on chamber walls.

Direct detection of H atoms in the catalytic chemical vapor deposition of the SiH4/H2 system

A new type of thermal chemical vapor deposition (CVD) method is presented. In the method, material gases are decomposed by catalytic or pyrolytic reaction with a heated catalyzer, so that films can be deposited at temperatures less than 300 °C without any plasma or photochemical excitation, and the method is particularly called ‘‘Catalytic‐CVD.’’ Hydrogenated amorphous silicon films are deposited by this method, and the deposition mechanism is also investigated. It is found that device‐quality amorphous silicon films can be obtained and that inactive species, which are generated at the catalyzer and transported without gas‐phase reactions, are key species to make a high‐quality film by this method.

Hideki Matsumura

Papers

Formation of Silicon-Based Thin Films Prepared by Catalytic Chemical Vapor Deposition (Cat-CVD) Method

Theoretical Considerations on Lateral Spread of Implanted Ions

Catalytic Chemical Vapor Deposition (CTC–CVD) Method Producing High Quality Hydrogenated Amorphous Silicon

Direct detection of H atoms in the catalytic chemical vapor deposition of the SiH4/H2 system

Study on catalytic chemical vapor deposition method to prepare hydrogenated amorphous silicon