Silicon‐rich SiO2 films of various compositions were deposited by atmospheric or plasma‐enhanced chemical vapor deposition (CVD) techniques. These films were annealed at various temperatures between 700 and 1100 °C. The growth and crystallinity of the silicon clusters were monitored by transmission electron microscopy. The growth of the silicon clusters was found to be diffusion controlled with an activation energy measured to a first approximation at 1.9 eV/atom for both atmospheric and plasma‐enhanced CVD films. A minimum annealing temperature of between 800 and 950 °C and a minimum amount of excess Si above SiO2 are required to form crystalline silicon particles in the films. The minimum silicon crystal diameter was measured at 2.5 nm.

Annealing characteristics of Si‐rich SiO2 films

Optical interference fringe measurements of the thickness of transparent layers can be rapid, accurate, and nondestructive. If the refractive index n of the layer being measured is known, it may be combined directly with interference fringe information to yield the layer thickness t. If, however, n is unknown, the measurement procedure necessarily becomes more complicated. In this paper, a new and simpler optical interference method is presented for the approximate determination of both n and t of a transparent layer on a transparent substrate. The required experimental information is obtained from a single spectrophotometric recording of either the reflectance or transmittance of the layer and its substrate. The theory of the method is presented, and an application of the method to measurements of layers of SIPOS (Semi-Insulating POlycrystalline Silicon) is described. The method requires that the layer being measured must be uniformly deposited on a flat substrate, and it must neither absorb nor scatter the light passing through it. The major approximation inherent in the method is that both the layer and the substrate are assumed to be nondispersive over the wavelength region of interest.

Optical interference method for the approximate determination of refractive index and thickness of a transparent layer

Thermally deposited silicon films doped with oxygen atoms and used as passivation films on silicon devices have been studied with transmission electron microscopy, x‐ray diffraction, and ESCA. The films contain at least two phases, silicon microcrystals and silicon oxide. The size of the microcrystals in as‐deposited films was dependent both on the deposition temperature and on the oxygen concentration. Heat treatment caused crystal growth which depended mainly on the annealing temperature and weakly on the annealing time. The lattice constant of the microcrystals was directly related to their size. The silicon oxide phase in as‐deposited films was found to be SiO1.4. The results suggest ’’mosaic’’ model of the films which are amorphous when the diameter of the silicon microcrystals was less than 10 A.

Crystallographic study of semi‐insulating polycrystalline silicon (SIPOS) doped with oxygen atoms

Mass production of industrial tunnel oxide passivated contacts (i‐TOPCon) silicon solar cells with average efficiency over 23% and modules over 345 W

Chemical vapor deposition has been used to deposit films of a wide variety of materials. Those of particular interest to the glass industry include coatings of silicon, titanium nitride, and the oxides of silicon, aluminum, tin, zinc and transition metals, which can add very useful electrical and optical properties to glass. Several different chemical sources and reactions are used to deposit these materials. Comparison of these processes will be made in terms of ease of use of the precursors, attainable deposition rates, and safety and cost of the precursors. Equipment has been developed to deposit these materials with excellent thickness uniformity over large areas of glass. Fluorine-doped tin oxide and zinc oxide efficiently reflect infrared heat (low emissivity), thereby increasing the insulating ability of windows. These materials also conduct electricity, leading to a variety of applications, including solar cells, flat-panel displays, touch control panels, and static dissipation. Titanium nitride provides near-infrared reflectivity, which can provide high-performance rejection of solar heat (solar control glass). Silicon/silicon dioxide/silicon trilayers form durable mirror coatings with high reflectivity to visible light. Amorphous aluminum oxide films are excellent barriers to diffusion of sodium out of soda-lime glass.

Chemical vapor deposition of coatings on glass

A semi-insulating polycrystalline-silicon (SIPOS) film doped with oxygen atoms is deposited on the surface of silicon substrates by a chemical vapor reaction of silane and nitrous oxide in nitrogen ambient, and has been studied for the surface passivation of MOS-IC's, in particular, C/MOS-IC's of channel-stopperless structure. SIPOS films are semi-insulating and intrinsically neutral. A double-layer system consisting of 3000 A SIPOS and 6000 A SiO2 films is employed as a replacement of a thick silicon dioxide layer in C/MOS-IC's of channel-stopperless structure and exhibits excellent field-passivating properties, namely, a small drain-source leakage current, a high drain breakdown voltage, and a high parasitic threshold voltage. Furthermore, the silicon surface passivated by SIPOS films shows high stability under a severe bias-temperature stress. It is concluded that C/MOS-IC's passivated by SIPOS films are not required to have a channelstopper diffusion region and can be operated at high applied voltages, which leads to higher integrating density and higher reliability.

https://iopscience.iop.org/article/10.7567/JJAPS.15S1.41/pdf

Semi-Insulating Polycrystalline-Silicon (SIPOS) Films Applied to MOS Integrated Circuits

In a memory type insulated gate field effect semiconductor device including a semiconductor layer of one conductivity type, a source region of the opposite conductivity type formed in the surface of the semiconductor layer, a drain region of the opposite conductivity type formed in the surface of the semiconductor layer, a gate insulating layer affixed to the surface of the semiconductor layer, and a gate electrode deposited on the surface of the gate insulating layer, the gate insulating layer has a pair of thick gate guarding portions which exist on side of the source and drain regions, and a thin memory portion intermediate between the thick gate guarding portions, and a surface impurity concentration per square centimeter of the semiconductor layer under the thick gate guarding portions is different from a surface impurity concentration per square centimeter of the semiconductor layer under the tin memory portion. The voltage difference between the threshold voltages of the semiconductor device at the memorized state and at the non-memorized state can be increased, and the read-out voltage of the semiconductor device can be reduced. The circuit design is simplified.

Memory type insulating gate field effect semiconductor device

PURPOSE:To avert the degradation of memory effect owing to electrical fatigue by providing a first gate which performs memory action when a write potential is applied between source and drain, and right and left symmetrical second gates which are applied with a read potential and have no memory action.

Nonnvolatile memory transistor

PURPOSE:To make an IC of IG type MOSFETs by making insulation layers having thick and thin parts with the same mask, and opening holes through the use of the difference in film thickness thereby forming the diffusion mask

Production of semiconductor integrated circuit

PURPOSE: To provide a highly reliable memory unit by providing the voltage difference between the "0" level and the "1" level larger and reducing readout voltage lower as the surface impurity density is made different between the memory section and the gate protection section. COPYRIGHT: (C)1977,JPO&Japio

Hidenobu Mochizuki

Papers

Semi-Insulating Polycrystalline-Silicon (SIPOS) Films Applied to MOS Integrated Circuits

Memory type insulating gate field effect semiconductor device

Nonnvolatile memory transistor

Production of semiconductor integrated circuit

Mios type memory unit