An improved solar cell design and method of fabrication that primarily uses two materials, n-type doped silicon and aluminum to form a p-n alloy junction back contact solar cell. The aluminum alloy junctions are placed on the back (unilluminated) side of the cell, thereby combining the desirable features of aluminum (as a dopant, contact metal and light reflector), with the advantages of a back contact cell. The cell design and method of fabrication includes such features as surface texturing, front and back surface field minority carrier mirrors, surface passivation using oxidation layers, use of Al contacts as light reflectors, intrinsic protection against reverse bias due to contiguous n + and p + regions, and an improved bus bar contact design suitable for interconnecting cells using a surface mount technology. An improved method of ohmic contact formation uses a self-alignment technique for forming the ohmic contacts.

Structure and fabrication process for an aluminum alloy junction self-aligned back contact silicon solar cell

The preparation, characterization and applications of silicon nitride thin films

The importance of silicon nitride (Si3N4) prepared by the chemical vapor deposition (C VD) technique is discussed briefly. A computer code was used to calculate CVD phase diagrams useful for the preparation of this material. Theoretical deposition efficiencies and gaseous phase compositions are also reported. The reactants include NH3/SiH4, NH3/SiH2Cl2, NH3/SiCl4, and NH3/SiF4. The effect of N2, H2, and Ar additions, as well as the system pressure, are evaluated. The results are compared with experimental data from the literature.

Thermodynamic Calculations for the Chemical Vapor Deposition of Silicon Nitride

We disclose a high voltage semiconductor device comprising a semiconductor substrate of a second conductivity type; a semiconductor drift region of the second conductivity type disposed over the semiconductor substrate, the semiconductor substrate region having higher doping concentration than the drift region; a semiconductor region of a first conductivity type, opposite to the second conductivity type, formed on the surface of the device and within the semiconductor drift region, the semiconductor region having higher doping concentration than the drift region; and a lateral extension of the first conductivity type extending laterally from the semiconductor region into the drift region, the lateral extension being spaced from a surface of the device.

High voltage semiconductor devices

A method of forming patterned films on a semiconductor substrate 10 includes the steps of depositing a hardened photo resist underlay 30 onto the substrate, then depositing a polyether sulfone release layer 32, then depositing a photo sensitive resist layer 34 and exposing an etching a metallization pattern 36, 38 to the substrate 10. The structure is then blanket deposited with a conductive layer 40 to thereby create a conductive contact stud 42. The film layer 40 and resist layer 34 are removed by dissolving the polyether sulfone layer 32 in an NMP solution and the photo resist underlayer 30 is then removed using a selective photo resist stripper composition.

Method for forming patterned films on a substrate

A bifacial solar cell structure is applied to multicrystalline substrates obtained from the OTC cast material. The double sided cathode configuration made it possible to collect photogenerated minority carriers from the nearest side of the cell, which allows the minority carrier not necessarily to travel across the substrate having short diffusion lengths. The rear cathode acts as a current booster for the front cathode for light entering from the front side, and vice versa. Because of this two fold current enhancement, cell outputs equivalent to nearly 20% efficiency are obtainable from a 15% cell when 30% albedo from the rear side is incorporated. A simplified screen printing process for cell fabrication provides a promising method of scaled production. >

Bifacial multicrystalline silicon solar cells

This invention concerns a so-called double-moat uni-surface type semiconductor device in which two concentric moats are provided in one main surface of the substrate and the edges of the two pn-junctions for blocking main circuit voltages applied to the device are exposed in the surfaces of the moats. Semiconductor layers having high impurity concentrations and serving as channel stoppers are formed on the semiconductor layers exposed in the one main surface of the substrate, contiguous to the moats and spaced apart from the pn-junctions, each high impurity concentration layer having the same conductivity type as the semiconductor layer on which it is formed. The moats are filled with surface passivating material.

Semiconductor device with double moat and double channel stoppers

PURPOSE: To reduce a solar cell in loss caused by contact resistance and to improve it in conversion efficiency keeping a crystal silicon substrate at a prescribed value in thickness by a method wherein a groove formed of a P + layer and another groove formed of an N + layer are formed on the side of the crystal silicon substrate opposed to its photodetecting side, and a metal electrode is filled into the grooves respectively. CONSTITUTION: Two type of grooves are formed adjacent to each other on the side of a P-type crystal silicon substrate opposed to its side on which light is incident. One of the grooves is composed of a P + -type silicon regrowth layer 11 and the other groove is composed of an N + -type semiconductor layer 13, an aluminum.silicon alloy layer 12 is provided into the groove of the regrowth layer 11, and a silver electrode 14 is provided inside the groove of the N + -type semiconductor layer 13 coming into contact with layer 13. A silicon oxide film 10 is formed on the surface of the P-type crystal silicon substrate between the aluminum.silicon alloy layer 12 and the silver electrode 14. The aluminum.silicon alloy layer 12 and the silver electrode 14 formed on the side of the silicon substrate 1 opposed to its side on which light is incident are arranged in a comb-like pattern respectively so as to constitute such a pattern that the teeth of one comb are inserted between the teeth of the other comb respectively. COPYRIGHT: (C)1991,JPO&Japio

Solar cell and manufacture thereof

A large-area semiconductor wafer with a backing member attached on one of its principal surfaces is divided into a plurality of small-area semiconductor pellets. A glass film is coated on the selected surface of each pellet and thereafter the pellets are detached from the backing member.

Method of producing a semiconductor device

In a high-withstand-voltage (high-breakdown voltage) semiconductor device in which the main PN junction is of planar structure and a field limiting ring region is provided outside and around the exposed end of the main PN junction, a groove is formed between the main region to form the main PN junction and the field limiting ring region, the bottom of which groove is shallower than that of each of the regions and in the surface of which groove the end of the main PN junction and one of the ends of the PN junction between the field limiting ring region and the substrate are exposed, and the other end of the PN junction between the field limiting ring region and the substrate is exposed in the surface of another groove whose bottom is deeper than that of the field limiting ring region.

Hideyuki Yagi

Papers

Bifacial multicrystalline silicon solar cells

Semiconductor device with double moat and double channel stoppers

Solar cell and manufacture thereof

Method of producing a semiconductor device

High withstand voltage semiconductor device with shallow grooves between semiconductor region and field limiting rings with outer mesa groove