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Hiroaki Hoshino

Researcher at Toshiba

Publications -  25
Citations -  678

Hiroaki Hoshino is an academic researcher from Toshiba. The author has contributed to research in topics: Signal & Phase-locked loop. The author has an hindex of 10, co-authored 25 publications receiving 648 citations.

Papers
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Journal ArticleDOI

A 77 GHz 90 nm CMOS Transceiver for FMCW Radar Applications

TL;DR: In this paper, the first 77 GHz frequency modulated continuous wave (FMCW) radar transceiver IC with an accurate FMCW chirp signal generator using a 90 nm CMOS process is presented.
Journal ArticleDOI

A 60-GHz CMOS Receiver Front-End With Frequency Synthesizer

TL;DR: In this paper, a 60 GHz receiver (RX) front-end chip fabricated in 90 nm CMOS process is presented, which consists of an LNA, a downconversion mixer, and a phase-locked loop synthesizer.
Journal ArticleDOI

A 2-Gb/s Throughput CMOS Transceiver Chipset With In-Package Antenna for 60-GHz Short-Range Wireless Communication

TL;DR: This paper presents a fully integrated CMOS 60-GHz transceiver chipset for short-range and high-speed wireless communication, composed of two chips, an RF chip with in-package antenna, and a baseband chip including PHY and MAC layer.
Proceedings ArticleDOI

A 60-GHz phase-locked loop with inductor-less prescaler in 90-nm CMOS

TL;DR: A 60-GHz phase-locked loop (PLL) with inductor-less prescaler is fabricated in a 90-nm CMOS process and has a smaller chip area than previously reported ones.
Proceedings Article

A 77 GHz 90 nm CMOS transceiver for FMCW radar applications

TL;DR: Measured radar performances, output spectrum and distance of a target, show the transceiver achieves a fundamental function for radar applications.