This paper presents a distributed multi-phase oscillator based on left-handed LC-ring. In contrast to traditional designs that couple multiple LC-tanks through MOSFETs, it uses an LC-ring as a single high-order resonator that generates multi-phase resonant signal. By avoiding coupling MOSFETs which deteriorate phase noise significantly, it can synthesize multiple phases while maintaining the same phase-noise figure-of-merit (FoM) as a single-stage LC oscillator. This also provides a systematic way of trading power for phase noise. The dynamics and the phase noise of the LC-ring oscillator are analyzed based on a mode-decomposition model. We also address the duality of left-/right-handed resonator in the context of oscillator in detail. These analysis was verified by prototypes in a 0.13 μm CMOS process with 0.5 V supply voltage: a four-stage LC-ring oscillator at 5.12 GHz draws 8 mA current and achieves a phase noise of -121.6 dBc/Hz@600 kHz, while a single-stage one at 5.34 GHz draws 2 mA and achieves -116.1 dBc/Hz@600 kHz. There is a good agreement among analysis, simulation, and measurement.

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A Low-Phase-Noise Multi-Phase Oscillator Based on Left-Handed LC-Ring

This paper presents a multi-phase sub-harmonic injection locking technique. This technique can significantly increase the locking range of a multi-phase injection locking oscillator compared to the conventional single-phase injection locking scheme. By application of this technique, a scalable “active frequency multiplier” chain architecture is proposed, which can generate THz signal from a low mm-wave frequency or RF reference source. We also propose a multi-ring system topology to implement this frequency multiplier scheme. As proof of concept, a cascaded 3-stage 3-phase 2nd-order sub-harmonic injection locking oscillator chain is implemented in the IBM9HP SiGe BiCMOS process with its $f_{\rm T}/f_{\max}$ of 300/350 GHz. The design achieves a maximum output power of $-$ 16.6 dBm at 498 GHz, a phase noise of $-$ 87 dBc/ Hz at 1 MHz offset, and a total 5.1% frequency tuning range from 485.1 GHz to 510.7 GHz, which is the largest frequency tuning range among all the reported silicon-based THz oscillator sources in the 0.5 THz band.

A Multi-Phase Sub-Harmonic Injection Locking Technique for Bandwidth Extension in Silicon-Based THz Signal Generation

A 1-V quadrature voltage-controlled oscillator (QVCO) using subharmonic and injection-locked techniques (SHIL-QVCO) is presented. Instead of using the traditional transformer-coupling LC tank with a large area to implement the quadrature output, we use a frequency-doubled differential pair with an injection-locked method. The proposed QVCO is implemented with a TSMC 0.18- μm 1P6M CMOS process having a 1.4 × 0.67 × mm2 chip area. This QVCO has the advantages of low phase noise and low power consumption. Experimental results show that the QVCO has a phase noise of - 126 dBc/Hz at an offset frequency of 1 MHz and a power consumption of 4.9 mW to achieve a 186 figure of merit. Moreover, a tuning frequency between 2.17 and 2.52 GHz can be obtained with a tuning voltage range of 0-1 V for the IEEE 802.15.4.

A CMOS Quadrature VCO With Subharmonic and Injection-Locked Techniques

This paper presents a new analytical approach to extract closed form equations for phase and amplitude imbalances raised from mismatches between two LC-tanks in quadrature oscillators. For more generality, we considered different coupling factors for the two coupled oscillators. This makes our analysis so general that we could design a phase and amplitude tunable quadrature oscillator accordingly. We show that choosing appropriate inversely proportional coupling factors makes it possible to have exactly zero phase and amplitude errors. Choosing so does not have any impacts on phase noise; indeed, the trade-off between phase noise and phase error in coupled quadrature oscillators has been broken here. We show that using differential stages for tuning tail currents of oscillating stages can somehow implement the inversely proportional coupling factors. Tuning the phase and amplitude errors, the frequency does not change and power consumption remains constant too; these are the advantages of the proposed circuit. The theoretical results and proposed quadrature oscillator are evaluated and confirmed through simulations using TSMC 0.18 model technology on a 5-GHz quadrature oscillator with current consumption of 4.2 mA at 1.8 V supply voltage.

A Phase and Amplitude Tunable Quadrature $LC$ Oscillator: Analysis and Design

A multi-phase sub-harmonic injection locking technique for bandwidth extension in silicon-based THz signal generation

This paper presents the design, analysis, and characterization of a low-power, low-phase-noise, phase-tunable injection-coupled LC quadrature oscillator (PTIC-QVCO). Two LC VCOs are superharmonically coupled in quadrature phase via a frequency doubler that injects a synchronizing signal at the common source node of the negative transconductor stage. Conceptual and analytical models of the circuit are introduced to derive the conditions for quadrature operation and examine the circuit parameters affecting the phase imbalance due to mismatched VCOs. Additionally, a tunable tail filter (TTF) is incorporated to calibrate the residual quadrature imbalance in presence of a 3-sigma variation in the device parameters and drive the oscillator to its optimum phase noise performance. To validate the proposed approach, measurements have been carried out on a 9 GHz prototype implemented in a 0.18 mum RF CMOS process. With core current consumption of 5 mA at 1.8 V supply voltage, the circuit achieves a measured phase noise figure-of-merit ranging from 177.3 to 182.6 dBc/Hz at 3 MHz offset along the 9.0 to 9.6 GHz frequency tuning range. Quadrature phase correction of plusmn110 at 9 GHz is demonstrated.

I.R. Chamas

Papers

Analysis and Design of a CMOS Phase-Tunable Injection-Coupled LC Quadrature VCO (PTIC-QVCO)