The module (2/sup n/+1) multiplication is widely used in the computation of convolutions and in RNS arithmetic and, thus, it is important to reduce the calculation delay. This paper presents a concept of a module (2/sup n/+1) carry save adder (MCSA) and uses two MCSAs to perform the residue reduction. We also apply Booth's algorithm to the module (2/sup n/+1) multiplication scheme in order to reduce the number of partial products. With these techniques, the new architecture reduces the multiplier's calculation delay and is suitable for VLSI implementation for moderate and large n (n/spl ges/16).

A simplified architecture for module (2/sup n/+1) multiplication

We investigate image and video convolutions based on Fermat number transform (FNT) modulo q=2/sup M/+1 where M is an integer power of two. These transforms are found to be ideal for image convolutions, except that the choices for the word length, restricted by the transform modulus, are rather limited. We discuss two methods to overcome this limitation. First, we allow M to be an arbitrary integer. This gives much wider variety in possible moduli, at the cost of decreased transform length of 16 or 32 points for M<32. Nevertheless, the transform length appears still to be useful especially with block-based image and video filtering applications. We call these transforms the generalized FNT (GFNT). The second solution is to use a residue number system (RNS) to enlarge the effective modulus, while performing actual number theoretic transforms with smaller moduli. This approach appears to be particularly useful with moduli q/sub 1/=2/sup 16/+1 and q/sub 2/=2/sup 8/+1, which allow transforms up to 256 points with a dynamic range of about 24 bits. We design an efficient reconstruction circuit based on mixed radix conversion for converting the result from diminished-1 RNS into normal binary code. The circuit is implemented in VHDL and found to be very small in area. We also discuss the necessary steps in performing convolutions with the GFNT and evaluate the integrated circuit implementation cost for various elementary operations.

Video filtering with Fermat number theoretic transforms using residue number system

Publisher Summary This chapter introduces the concepts of number theoretic transforms (NTT) and their applications to 2-D convolutions. The use of NTT's for 2-D convolutions is discussed and a method for calculating them without matrix transpose and without overlap is explained with examples. Although the transform domain for 2-D NTTs is not as simple to interpret as for some other transforms, the 2-D Fermat number transform (FNT) domain does have special patterns of zeros and nonzero values that could find applications. These are discussed for a number of simple images and for 2-D periodic structures. The effects of small errors in the periodic data on the 2-D FNT are discussed and applications are considered. Another family of transforms based upon the Mersenne numbers is introduced together with its separable form. The transform is extended to the multidimensional case. The chapter provides an overview of how this transform can be combined with the 2-D FNT, using the 2-D mixed radix conversion, to provide extended dynamic range and great parallelism using simple and convenient moduli leading to an efficient method for parallel image-processing applications. Because of the somewhat inconvenient word lengths required by some NTTs, the use of very-large-scale integration (VLSI), where the word length can be chosen to suit the design, has had a dramatic effect on circuit design for NTTs. A number of designs for pipeline FNT processors, including a vector radix structure, are discussed in the chapter.

Number Theoretic Transforms and their Applications in Image Processing

Theproperties of arithmetic operations in Fermat integer quotient ringsZ m , where m , are investigated. The arithmetic operations considered are mainly those involved in the computation of the Fermat number transform. We consider somewaysof representing the binary coded integers in such rings and investigate VLSI architectures for arithmetic operations, with respect to the different element representations. The VLSI architectures are mutually compared with respect to area (A) and time (T ) complexity and area-time performance (AT ). The VLSI model chosen is a linear switch-level RC model. In the polar representation, the nonzero elements of a field are represented by the powers of a primitive element of the field. In the thesis we particularly investigate the properties of arithmetic operations and their corresponding VLSI architectures with respect to the polar representation of the elements of Fermat prime fields. Some new results regarding the applicability of the Fermat number transform when using the polar representation are also presented.

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VLSI Architectures and Arithmetic Operations with Application to the Fermat Number Transform

VLSI implementation issues for the 2-D Fermat number transform

A parallel architecture for computation of the linear convolution of two sequences of arbitrary lengths using the Fermat number transform (FNT) is described. In particular a pipeline structure is designed to compute a 128-point FNT. In this FNT, only additions and bit rotations are required. A standard barrel shifter circuit is modified so that it performs the required bit rotation operation. The overlap-save method is generalized for the FNT to compute a linear convolution of arbitrary length. A parallel architecture is developed to realize this type of overlap-save method using one FNT and several inverse FNTs of 128 points. The generalized overlap save method alleviates the usual dynamic range limitation in FNTs of long transform lengths. Its architecture is regular, simple, and expandable, and therefore naturally suitable for VLSI implementation.

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I. S. Reed

Papers

A parallel VLSI architecture for a digital filter of arbitrary length using Fermat number transforms