A self-consistent iterative scheme for the numerical calculation of dc potentials and currents in a one-dimensional transistor model is presented. Boundary conditions are applied only at points representing contacts. Input data are: doping profile, parameters governing excess carrier recombination, parameters describing the dependence of mobility on doping and on electric field, applied emitter and collector voltages, and a trial solution for the electrostatic potential. The major limitation of the present approach results from use of Boltzmann rather than Fermi statistics. Convergence of the iteration scheme is good for low and moderate injection levels.

A self-consistent iterative scheme for one-dimensional steady state transistor calculations

It is shown that the observed falloff in the f T of a transistor at high currents is due to the spreading of the neutral base layer into the collector region of the device at high current densities. The base layer spreading mechanism derives from an analysis of the effect of the current-dependent buildup of the mobile-carrier space-charge density in the collector transition layer. Calculations show that at sufficiently high collector current levels, the mobile space-charge density in the collector transition layer cannot be considered negligible in comparison to the fixed charge density of that region. The over-all effect of taking the mobile space charge into account in analyzing the collector transition region is that, at high current densities, the transition region boundary adjacent to the neutral base layer is displaced toward the collector metal contact with increasing collector current. The attendant widening of the neutral base layer results in the observed, high-current falloff in f T . The application of this theory to transistor structures of both the alloy and mesa variety yields, in each case, calculated curves of f T vs I c which are in reasonably good agreement with experiment.

A theory of transistor cutoff frequency (f T ) falloff at high current densities

A simple analysis shows that the ultimate performance limits of a transistor are set by the product Ev_{s}/2\pi , where E is the semiconductor's dielectric breakdown strength and v_{s} is its minority carrier saturated drift velocity. This product, having a value of about 2 \times 10^{11} volts/ second for silicon, emphasizes that a semiconductor material has a maximum capability for energizing the electric charges that process a signal. If the device operating frequency is high, the frequency time period is short and only a small amount of energy can be given to a charge carrier. Consequently, the power and power amplification must be relatively low. At low frequencies the inverse is true. That is, device physics demands an inverse relation between frequency and power parameters that is independent of the thermal dissipation arguments commonly given to explain the trade-off between these parameters. The analysis leads to an effective means for making comparisons between existing devices. This is illustrated.

Physical limitations on frequency and power parameters of transistors

Miniaturization has steadily increased the economic usefulness of digital electronics through the past two decades. A variety of physical arguments are brought to bear on the question of how far miniaturization can be extended. The implications of the laws of quantum mechanics and thermodynamics for information storage are examined. The need for power dissipation in electrical information processing is demonstrated and the limits set on miniaturization by the problems of removing the heat thereby produced are estimated. limits with origins in properties of the materials used to make electronic devices are reviewed. The potential performance of various technologies based on nonsemiconductor phenomena is estimated and compared with the limits found for planar silicon technology. Attempts are made to guess at all of the many unknown parameters that enter into broadly applicable quantitative expressions of the properties of logic circuitry so that actual values of the limits can be estimated.

Physical limits in digital electronics

A theoretical and experimental study of the effects of high-level injection of carriers into a reverse-biased collector-base junction has been performed. Two models which describe the high-current behavior of the junction space-charge region are discussed. The first deals with the formation of a current-induced base region at space-charge-limited current densities. The second model assumes that two-dimensional effects are predominant; at current densities corresponding to the onset of space-charge-limited current, lateral injection of carriers takes place. These phenomena were studied experimentally using silicon double-diffused transistor structures. The existence of space-charge-limited current in the reverse-biased collector depletion layer manifests itself in significant changes in the ac and dc parameters of the transistor. In particular, it is shown that the cutoff frequency (f T ) and large-signal current gain (h FE ) begin to decrease rapidly with increasing current at the onset of the space-charge limitation. A comparison of experimental results with predictions of the above theories indicates that, while both the formation of a current-induced base region and lateral injection do take place, the latter mechanism controls conventional device performance.

Current gain and cutoff frequency falloff at high currents

This paper discusses some fundamental frequency limitations of the junction triode. It also describes briefly practical accomplishments with germanium diffused base transistors of the type reported by Lee. Finally, the frequency limitations of the junction triode are compared with those of the field effect transistor and the analog transistor. For transistors of the mesa type with linear emitter and base electrodes (i.e., an emitter stripe with parallel base contact stripes a fraction of the emitter width distant on each side), the (power gain)?(bandwidth) product is found to be about 7.5 × 106/s cps where s is emitter stripe width in centimeters. This is an order of magnitude better than the corresponding figures for field effect and analog transistors. For operation at or below the alpha cutoff fre quency, the gain-band product is shown to be nearly independent of the particular alpha cutoff frequency selected. This independence arises from the reciprocity between collector depletion layer capaci tance per unit area and collector depletion layer transit time. This transit time effectively determines alpha cutoff frequency in optimunm gain-band designs.

J. M. Early

Papers

Structure-Determined Gain-Band Product of Junction Triode Transistors