J
J. Pasanen
Researcher at Tampere University of Technology
Publications - 8
Citations - 113
J. Pasanen is an academic researcher from Tampere University of Technology. The author has contributed to research in topics: FPGA prototype & Digital signal processing. The author has an hindex of 5, co-authored 8 publications receiving 111 citations.
Papers
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Journal ArticleDOI
Predictive synchronization and restoration of corrupted velocity samples
TL;DR: In this paper, a cascade predictor structure is proposed for good overall noise attenuation, which is capable of synchronizing and restoring the corrupted and unevenly spaced samples, and a software implementation of the proposed algorithm has been developed and tested on the TMS320C25 signal processor.
Journal ArticleDOI
DSP system integration and prototyping with FPGAS
TL;DR: The fast ASIC prototyping concept based on the use of multiple FPGAs is reviewed in different engineering applications and some future goals are outlined to develop an integrated, multipurpose DSP ASIC prototypes prototyping environment.
Journal ArticleDOI
A digital signal processing approach to real-time AC motor modeling
TL;DR: A more compact implementation of the AC motor model is obtained (although a higher sampling rate is required) as compared to the bilinear transformed model of equivalent performance and 2.7 times higher computational complexity.
Journal ArticleDOI
An integrated digital motion control unit
TL;DR: In this article, a digital motion control system for automatic elevator doors is presented with primary applications in automatic elevator door, where digital signal processing methods are used for generating exponential waveforms for the drive motor, which keeps track of the actual speed of motion and the corresponding door position.
Proceedings ArticleDOI
DSP ASIC evaluation with fast prototyping
TL;DR: This work evaluates the utilization of the fast prototyping concept using the practical design experience gained in DSP ASIC integration on the basis of both schematic capture and VHDL based synthesis.