Creep behavior of niobium-modified zirconium alloys

Circumferential creep properties of stress-relieved Zircaloy-4 and Zr–Nb–Sn–Fe cladding tubes

High temperature deformation behavior of Zr-1Nb alloy

Sn5%Sb is one of the materials considered for replacing lead containing alloys for soldering in electronic packaging. We evaluated the tensile properties of the bulk material at varied strain-rates and temperatures (to 473K) to determine the underlying deformation mechanisms. Stress exponents of about three and seven were observed at low and high stresses, respectively, and very low activation energies for creep (about 16.7 and 37.7 kJ/mole) were noted. A maximum ductility of about 350% was noted at ambient temperature. Creep tests performed in the same temperature regime also showed two distinct regions, albeit with slightly different exponents (three and five) and activation energy (about 54.4 kJ/mole). Ball indentation tests were performed on the shoulder portions of the creep samples (prior to creep tests) using a Stress-Strain Microprobe@ (Advanced Technology Corporation) at varied indentation rates (strain-rates). The automated ball indentation (ABI) data were at relatively high strain-rates; however, they were in excellent agreement with creep data, while both these results deviated from the tensile test data. Work is planned to perform creep at high stresses at ambient and extend ABI tests to elevated temperatures.

Tensile, creep, and ABI tests on Sn5%Sb solder for mechanical property evaluation

Annealing of cold worked two-phase Zr-2.5 Nb—Associated microstructural developments

Transitions in creep mechanisms and creep anisotropy in Zr1Nb1Sn0.2Fe sheet

Modern-era high performance computing (HPC) systems are providing multiple levels of memory and storage layers to bridge the performance gap between fast memory and slow disk-based storage system managed by Lustre or GPFS. Several of the recent HPC systems are equipped with SSD and NVMe-based storage that is attached locally to compute nodes. A few systems are providing an SSD-based “burst buffer” intermediate storage layer that is accessible by all compute nodes as a single file system. Although these hardware layers are intended to reduce the latency gap between memory and disk-based long-term storage, how to utilize them has been left to the users. High-level I/O libraries, such as HDF5 and netCDF, can potentially take advantage of the node-local storage as a cache for reducing I/O latency from capacity storage. However, it is challenging to use node-local storage in parallel I/O especially for a single shared file. In this paper, we present an approach to integrate node-local storage as transparent caching or staging layers in a high-level parallel I/O library without placing the burden of managing these layers on users. We designed this to move data asynchronously between the caching storage layer and a parallel file system to overlap the data movement overhead in performing I/O with compute phases. We implement this approach as an external HDF5 Virtual Object Layer (VOL) connector, named Cache VOL. HDF5 VOL is a layer of abstraction in HDF5 that allows intercepting the public HDF5 application programming interface (API) and performing various optimizations to data movement after the interception. Existing HDF5 applications can use Cache VOL with minimal code modifications. We evaluated the performance of Cache VOL in HPC applications such as VPIC-10, and deep learning applications such as ImageNet and CosmoFlow. We show that using Cache VOL, one can achieve higher observed I/O performance, more scalable and stable I/O compared to direct I/O to the parallel file system, thus achieving faster time-to-solution in scientific simulations. While the caching approach is implemented in HDF5, the methods are applicable in other high-level I/O libraries.

HDF5 Cache VOL: Efficient and Scalable Parallel I/O through Caching Data on Node-local Storage

To alleviate bottlenecks in storing and accessing data on high-performance computing (HPC) systems, I/O libraries are enabling computation while data is in-transit, such as HDFS filters. For scientific applications that commonly use floating-point data, error-bounded lossy compression methods are a critical technique to significantly reduce the storage and bandwidth requirements. Thus far, deciding when and where to schedule in-transit data transformations, such as compression, has been outside the scope of I/O libraries. In this paper, we introduce Runway, a runtime framework that enables computation on in-transit data with an object storage abstraction. Runway is designed to be extensible to execute user-defined functions at runtime. In this effort, we focus on studying methods to offload data compression operations to available processing units based on latency and throughput. We compare the performance of running compression on multi-core CPUs, as well as offloading it to a GPU and a Data Processing Unit (DPU). We implement a state-of-the-art error-bounded lossy compression algorithm, SZ3, as a Runway function with a variant optimized for DPUs. We propose dynamic modeling to guide scheduling decisions for in-transit data compression. We evaluate Runway using four scientific datasets from the SDRBench benchmark suite on a the Perlmutter supercomputer at NERSC.

Runway: In-transit Data Compression on Heterogeneous HPC Systems

To alleviate bottlenecks in storing and accessing data on high-performance computing (HPC) systems, I/O libraries are enabling computation while data is in-transit, such as HDF5 filters. For scientific applications that commonly use floating-point data, error-bounded lossy compression methods are a critical technique to significantly reduce the storage and bandwidth requirements. Thus far, deciding when and where to schedule in-transit data transformations, such as compression, has been outside the scope of I/O libraries.In this paper, we introduce Runway, a runtime framework that enables computation on in-transit data with an object storage abstraction. Runway is designed to be extensible to execute user-defined functions at runtime. In this effort, we focus on studying methods to offload data compression operations to available processing units based on latency and throughput. We compare the performance of running compression on multi-core CPUs, as well as offloading it to a GPU and a Data Processing Unit (DPU). We implement a state-of-the-art error-bounded lossy compression algorithm, SZ3, as a Runway function with a variant optimized for DPUs. We propose dynamic modeling to guide scheduling decisions for in-transit data compression.

Parallel I/O is an effective method to optimize data movement between memory and storage for many scientific applications. Poor performance of traditional disk-based file systems has led to the design of I/O libraries which take advantage of faster memory layers, such as on-node memory, present in high-performance computing (HPC) systems. By allowing caching and prefetching of data for applications alternating computation and I/O phases, a faster memory layer also provides opportunities for hiding the latency of I/O phases by overlapping them with computation phases, a technique called asynchronous I/O. Since asynchronous parallel I/O in HPC systems is still in the initial stages of development, there hasn't been a systematic study of the factors affecting its performance.In this paper, we perform a systematic study of various factors affecting the performance and efficacy of asynchronous I/O, we develop a performance model to estimate the aggregate I/O bandwidth achievable by iterative applications using synchronous and asynchronous I/O based on past observations, and we evaluate the performance of the recently developed asynchronous I/O feature of a parallel I/O library (HDF5) using benchmarks and real-world science applications. Our study covers parallel file systems on two large-scale HPC systems: Summit and Cori, the former with a GPFS storage and the latter with a Lustre parallel file system.

J. Ravi

Papers

Transitions in creep mechanisms and creep anisotropy in Zr1Nb1Sn0.2Fe sheet

HDF5 Cache VOL: Efficient and Scalable Parallel I/O through Caching Data on Node-local Storage

Runway: In-transit Data Compression on Heterogeneous HPC Systems

Runway: In-transit Data Compression on Heterogeneous HPC Systems

Evaluating Asynchronous Parallel I/O on HPC Systems