Journal of Applied physics,Vol.33 : 1962年に発表されたレオロジー関連の論文

circular stapler for performing hemorrhoidal operations is disclosed The circular stapler includes an anvil, a stapler head and a shaft which movably supports the anvil in relation to the stapler head between open and closed positions The stapler includes at least one displacing member, each of which is arbitrarily and/or independently displaceable along the shaft Each of the at least one displacing members has a first end configured to engage a pursestring suture and a second end which extends through the body, eg, the neck of the stapler The displacing member is arbitrarily displaceable along the shaft In one embodiment, two independently displaceable displacing members are provided In another embodiment, the at least one displacing member is at least partially embedded in the shaft

Circular stapler for hemorrhoid operations

An object is to provide a method for manufacturing a semiconductor device, in which the number of photolithography steps can be reduced, the manufacturing process can be simplified, and manufacturing can be performed with high yield at low cost A method for manufacturing a semiconductor device includes the following steps: forming a semiconductor film; irradiating a laser beam by passing the laser beam through a photomask including a shield for shielding the laser beam; subliming a region which has been irradiated with the laser beam through a region in which the shield is not formed in the photomask in the semiconductor film; forming an island-shaped semiconductor film in such a way that a region which is not irradiated with the laser beam is not sublimed because it is a region in which the shield is formed in the photomask; forming a first electrode which is one of a source electrode and a drain electrode and a second electrode which is the other one of the source electrode and the drain electrode; forming a gate insulating film; and forming a gate electrode over the gate insulating film

Method for Manufacturing Semiconductor Device

Methods and systems for determining a critical dimension and overlay of a specimen

Substrate processing systems are described that have a capacitively coupled plasma (CCP) unit positioned inside a process chamber. The CCP unit may include a plasma excitation region formed between a first electrode and a second electrode. The first electrode may include a first plurality of openings to permit a first gas to enter the plasma excitation region, and the second electrode may include a second plurality of openings to permit an activated gas to exit the plasma excitation region. The system may further include a gas inlet for supplying the first gas to the first electrode of the CCP unit, and a pedestal that is operable to support a substrate. The pedestal is positioned below a gas reaction region into which the activated gas travels from the CCP unit.

Semiconductor processing system and methods using capacitively coupled plasma

A method of gap filling by using HDPCVD. On a substrate having a conductive structure, a first oxide layer is formed to protect the conductive structure. While forming the first oxide layer no bias is applied. An argon flow with a high speed of etching/deposition is provided to form a second oxide layer. While forming the second oxide layer a triangular or trapezium profile is formed due to an etching effect to the corner. An argon flow with a low speed of etching/deposition is provided to form a third oxide layer. The gap filling is completed.

Method of gap filling

CMP process development for the via-middle 3D TSV applications at 28nm technology node

Process development of high-k metal gate aluminum CMP at 28nm technology node

An antenna effect monitor includes a transistor formed on a semiconductor substrate. The transistor gate is coupled to a doped polysilicon interconnect layer which is also coupled to an antenna effect monitoring unit. Several metal bonding pads float in an orderly fashion above the doped polysilicon interconnect layer without coupling with each other. Several small metal layers are formed in an orderly fashion above the doped polysilicon interconnect layer but are electrically coupled together by several via plugs in between. The top small metal layer is coupled to the top bonding pad. The bottom small metal layer is electrically coupled to the doped polysilicon interconnect layer. Then a passivation layer covers the substrate but leaves a pad opening to expose the top bonding pad.

Structure of an antenna effect monitor

An apparatus for controlling a uniformity of a polished material is described. An air bag comprises a plurality of tubular rings. An air-bag manifold controller is connected to the tubular rings. The air-bag manifold controller controls inflation and deflation of the tubular rings in order to draw up the polished material and control pressure difference between different areas of the polished material.

J. Y. Wu

Papers

Method of gap filling

CMP process development for the via-middle 3D TSV applications at 28nm technology node

Process development of high-k metal gate aluminum CMP at 28nm technology node

Structure of an antenna effect monitor

Apparatus for controlling uniformity of polished material