Health, infrastructure, and environmental monitoring as well as networking and defense technologies are only some of the potential areas of application of micro-/nanosystems (MNSs). It is highly desirable that these MNSs operate without an external electricity source and instead draw the energy they require from the environment in which they are used. This Review covers various approaches for energy harvesting to meet the future demand for self-powered MNSs.

Nanotechnology-Enabled Energy Harvesting for Self-Powered Micro-/Nanosystems

Crossbar arrays based on two-terminal resistive switches have been proposed as a leading candidate for future memory and logic applications. Here we demonstrate a high-density, fully operational hybrid crossbar/CMOS system composed of a transistor- and diode-less memristor crossbar array vertically integrated on top of a CMOS chip by taking advantage of the intrinsic nonlinear characteristics of the memristor element. The hybrid crossbar/CMOS system can reliably store complex binary and multilevel 1600 pixel bitmap images using a new programming scheme.

A Functional Hybrid Memristor Crossbar-Array/CMOS System for Data Storage and Neuromorphic Applications

An array of piezoelectric nanowire LEDs with a pixel density of 6,350 dpi is capable of mapping two-dimensional pressure distributions with a spatial resolution of 2.7 micrometres. Pressure alters the light emissions from the LEDs, which are then imaged. Possible applications include artificial skin, robotics and touchpads.

http://www.nanoscience.gatech.edu/paper/2013/13_NP_02_SI.pdf

High-resolution electroluminescent imaging of pressure distribution using a piezoelectric nanowire LED array

Liqiang Mai,*,† Xiaocong Tian,† Xu Xu,† Liang Chang,‡ and Lin Xu†,§ †State Key Laboratory of Advanced Technology for Materials Synthesis and Processing, WUT-Harvard Joint Nano Key Laboratory, Wuhan University of Technology, Wuhan 430070, China ‡Department of Materials Science and Engineering, Michigan Technological University, Houghton, Michigan 49931-1295, United States Department of Chemistry and Chemical Biology, Harvard University, Cambridge, Massachusetts 02138, United States

Nanowire electrodes for electrochemical energy storage devices.

The development of three-dimensional (3D) synthetic biomaterials as structural and bioactive scaffolds is central to fields ranging from cellular biophysics to regenerative medicine. As of yet, these scaffolds cannot electrically probe the physicochemical and biological microenvironments throughout their 3D and macroporous interior, although this capability could have a marked impact in both electronics and biomaterials. Here, we address this challenge using macroporous, flexible and free-standing nanowire nanoelectronic scaffolds (nanoES), and their hybrids with synthetic or natural biomaterials. 3D macroporous nanoES mimic the structure of natural tissue scaffolds, and they were formed by self-organization of coplanar reticular networks with built-in strain and by manipulation of 2D mesh matrices. NanoES exhibited robust electronic properties and have been used alone or combined with other biomaterials as biocompatible extracellular scaffolds for 3D culture of neurons, cardiomyocytes and smooth muscle cells. Furthermore, we show the integrated sensory capability of the nanoES by real-time monitoring of the local electrical activity within 3D nanoES/cardiomyocyte constructs, the response of 3D-nanoES-based neural and cardiac tissue models to drugs, and distinct pH changes inside and outside tubular vascular smooth muscle constructs.

/pdf/macroporous-nanowire-nanoelectronic-scaffolds-for-synthetic-4tz8owh0k7.pdf

Macroporous nanowire nanoelectronic scaffolds for synthetic tissues

A nanoprocessor constructed from intrinsically nanometre-scale building blocks is an essential component for controlling memory, nanosensors and other functions proposed for nanosystems assembled from the bottom up. Important steps towards this goal over the past fifteen years include the realization of simple logic gates with individually assembled semiconductor nanowires and carbon nanotubes, but with only 16 devices or fewer and a single function for each circuit. Recently, logic circuits also have been demonstrated that use two or three elements of a one-dimensional memristor array, although such passive devices without gain are difficult to cascade. These circuits fall short of the requirements for a scalable, multifunctional nanoprocessor owing to challenges in materials, assembly and architecture on the nanoscale. Here we describe the design, fabrication and use of programmable and scalable logic tiles for nanoprocessors that surmount these hurdles. The tiles were built from programmable, non-volatile nanowire transistor arrays. Ge/Si core/shell nanowires coupled to designed dielectric shells yielded single-nanowire, non-volatile field-effect transistors (FETs) with uniform, programmable threshold voltages and the capability to drive cascaded elements. We developed an architecture to integrate the programmable nanowire FETs and define a logic tile consisting of two interconnected arrays with 496 functional configurable FET nodes in an area of ∼960 μm(2). The logic tile was programmed and operated first as a full adder with a maximal voltage gain of ten and input-output voltage matching. Then we showed that the same logic tile can be reprogrammed and used to demonstrate full-subtractor, multiplexer, demultiplexer and clocked D-latch functions. These results represent a significant advance in the complexity and functionality of nanoelectronic circuits built from the bottom up with a tiled architecture that could be cascaded to realize fully integrated nanoprocessors with computing, memory and addressing capabilities.

http://cml.harvard.edu/assets/Publ328_Nature470-240_Yan.pdf

Programmable nanowire circuits for nanoprocessors

Implementation of complex computer circuits assembled from the bottom up and integrated on the nanometer scale has long been a goal of electronics research. It requires a design and fabrication strategy that can address individual nanometer-scale electronic devices, while enabling large-scale assembly of those devices into highly organized, integrated computational circuits. We describe how such a strategy has led to the design, construction, and demonstration of a nanoelectronic finite-state machine. The system was fabricated using a design-oriented approach enabled by a deterministic, bottom-up assembly process that does not require individual nanowire registration. This methodology allowed construction of the nanoelectronic finite-state machine through modular design using a multitile architecture. Each tile/module consists of two interconnected crossbar nanowire arrays, with each cross-point consisting of a programmable nanowire transistor node. The nanoelectronic finite-state machine integrates 180 programmable nanowire transistor nodes in three tiles or six total crossbar arrays, and incorporates both sequential and arithmetic logic, with extensive intertile and intratile communication that exhibits rigorous input/output matching. Our system realizes the complete 2-bit logic flow and clocked control over state registration that are required for a finite-state machine or computer. The programmable multitile circuit was also reprogrammed to a functionally distinct 2-bit full adder with 32-set matched and complete logic output. These steps forward and the ability of our unique design-oriented deterministic methodology to yield more extensive multitile systems suggest that proposed general-purpose nanocomputers can be realized in the near future.

http://cml.harvard.edu/assets/PNAS_2014_111_2431-2435_Yao.pdf

James F. Klemic

Papers

Programmable nanowire circuits for nanoprocessors

Nanowire nanocomputer as a finite-state machine