In embodiments of the present invention improved capabilities are described for managing digital rights management (DRM) protected content sharing in a networked secure collaborative computer data exchange environment through a secure exchange facility managed by an intermediate organizational entity amongst users of a plurality of other organizational entities, wherein computer data content and access rights for the computer data content is shared between a first and second user, the computer data content and access rights for the computer data content are transformed into a DRM protected computer data content through communications with a DRM engine, wherein the DRM engine is selected based on a content type of the computer data content, and the DRM engine is provided by an entity other than the intermediate organizational entity and other than any of the plurality of other organizational entities.

Systems and methods of secure data exchange

Conventional error correction codes (ECCs), such as the commonly used BCH code, have become increasingly inadequate for solid state drives (SSDs) as the capacity of NAND flash memory continues to increase and its reliability continues to degrade. It is highly desirable to deploy a much more powerful ECC, such as low-density parity-check (LDPC) code, to significantly improve the reliability of SSDs. Although LDPC code has had its success in commercial hard disk drives, to fully exploit its error correction capability in SSDs demands unconventional fine-grained flash memory sensing, leading to an increased memory read latency. To address this important but largely unexplored issue, this paper presents three techniques to mitigate the LDPC-induced response time delay so that SSDs can benefit its strong error correction capability to the full extent. We quantitatively evaluate these techniques by carrying out trace-based SSD simulations with runtime characterization of NAND flash memory reliability and LDPC code decoding. Our study based on intensive experiments shows that these techniques used in an integrated way in SSDs can reduce the worst-case system read response time delay from over 100% down to below 20%. With our proposed techniques, a strong ECC alternative can be used in NAND flash memory to retain its reliability to respond the continuous cost reduction, and its relatively small increase of response time delay is acceptable to mainstream application users, considering a huge gain in SSD capacity, its reliability, and the price reduction.

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LDPC-in-SSD: making advanced error correction codes work effectively in solid state drives

The embodiments described herein methods and devices that enhance the endurance of a non-volatile memory (e.g., flash memory). The method includes obtaining, for each of the plurality of die, an endurance metric. The method also includes sorting the plurality of die into a plurality of die groups based on their corresponding endurance metrics, where each die group includes one or more die and each die group is associated with a range of endurance metrics. In response to a write command specifying a set of write data, the method further includes writing the write data to the non-volatile memory by writing in parallel subsets of the write data to the one or more die assigned to a single die group of the plurality of die groups.

Device and method for managing die groups

Emerging byte-addressable nonvolatile memories (NVMs) promise persistent memory, which allows processors to directly access persistent data in main memory. Yet, persistent memory systems need to guarantee a consistent memory state in the event of power loss or a system crash (i.e., crash consistency). To guarantee crash consistency, most prior works rely on programmers to (1) partition persistent and transient memory data and (2) use specialized software interfaces when updating persistent memory data. As a result, taking advantage of persistent memory requires significant programmer effort, e.g., to implement new programs as well as modify legacy programs. Use cases and adoption of persistent memory can therefore be largely limited. In this paper, we propose a hardware-assisted DRAM+NVM hybrid persistent memory design, Transparent Hybrid NVM (ThyNVM), which supports software-transparent crash consistency of memory data in a hybrid memory system. To efficiently enforce crash consistency, we design a new dual-scheme checkpointing mechanism, which efficiently overlaps checkpointing time with application execution time. The key novelty is to enable checkpointing of data at multiple granularities, cache block or page granularity, in a coordinated manner. This design is based on our insight that there is a tradeoff between the application stall time due to checkpointing and the hardware storage overhead of the metadata for checkpointing, both of which are dictated by the granularity of checkpointed data. To get the best of the tradeoff, our technique adapts the checkpointing granularity to the write locality characteristics of the data and coordinates the management of multiple-granularity updates. Our evaluation across a variety of applications shows that ThyNVM performs within 4.9% of an idealized DRAM-only system that can provide crash consistency at no cost.

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ThyNVM: enabling software-transparent crash consistency in persistent memory systems

A data storage system according to certain aspects can share a single snapshot for multiple applications and/or agents. For example, the data storage system can receive snapshot commands from multiple applications and/or agents, and can group them for a single snapshot (e.g., based on time of receipt of the snapshot commands). Data associated with the multiple applications and/or agents may reside on a single LUN or volume. The data storage system can take a single snapshot of the LUN or volume, and generate metadata regarding which portion of the snapshot is related to which application. The single snapshot can be stored in one or more secondary storage devices. The single snapshot may be partitioned into portions relating to different applications and stored separately.

Single snapshot for multiple agents

An auto-commit memory is capable of implementing a pre-configured, triggered commit action in response to a failure condition, such as a loss of power, invalid shutdown, fault, or the like. A computing device may access the auto-commit memory using memory access semantics (using a memory mapping mechanism or the like), bypassing system calls typically required in virtual memory operations. Since the auto-commit memory is pre-configured to commit data stored thereon in the event of a failure, users of the auto-commit memory may view these memory semantic operations as being instantly committed. Since operations to commit the data are taken out of the write-commit path, the performance of applications that are write-commit bound may be significantly improved.

Apparatus, system, and method for auto-commit memory

Apparatuses, systems, and methods are disclosed for data expiry. A method includes examining metadata associated with data in a non-volatile recording medium. A method includes expiring data from a non-volatile recording medium in response to metadata indicating that an expiration period for the data has been satisfied.

Data Expiry in a Non-Volatile Device

An apparatus, system, and method are disclosed for managing a cache. A cache interface module provides access to a plurality of virtual storage units of a solid-state storage device over a cache interface. At least one of the virtual storage units comprises a cache unit. A cache command module exchanges cache management information for the at least one cache unit with one or more cache clients over the cache interface. A cache management module manages the at least one cache unit based on the cache management information exchanged with the one or more cache clients.

Apparatus, system, and method for managing a cache

A method and apparatus for storing data packets in two different logical erase blocks pursuant to an atomic storage request is disclosed. Each data packet stored in response to the atomic storage request comprises persistent metadata indicating that the data packet pertains to an atomic storage request. In addition, a method and apparatus for restart recovery is disclosed. A data packet preceding an append point is identified as satisfying a failed atomic write criteria, indicating that the data packet pertains to a failed atomic storage request. One or more data packets associated with the failed atomic storage request are identified and excluded from an index of a non-volatile storage media.

Methods and appratuses for atomic storage operations

Apparatuses, systems, and methods are disclosed for managing non-volatile a medium. A method includes determining whether a first error correcting code (ECC) code word of a non-volatile storage device is correctable using a first error correcting code. A method includes determining whether a second ECC code word is correctable using a second error correcting code in response to determining that a first ECC code word is uncorrectable using a first error correcting code. A method includes adjusting one or more media parameters for accessing a non-volatile medium of a non-volatile storage device based on error information. Error information may include information from a decoder for a second error correcting code. Adjusting one or more media parameters may be in response to determining that a second ECC code word is correctable using a second error correcting code.

James G. Peterson

Papers

Apparatus, system, and method for auto-commit memory

Data Expiry in a Non-Volatile Device

Apparatus, system, and method for managing a cache

Methods and appratuses for atomic storage operations

Managing non-volatile media using multiple error correcting codes