J
Jamshaid Sarwar Malik
Researcher at Royal Institute of Technology
Publications - 11
Citations - 120
Jamshaid Sarwar Malik is an academic researcher from Royal Institute of Technology. The author has contributed to research in topics: Gaussian & Random number generation. The author has an hindex of 6, co-authored 11 publications receiving 102 citations. Previous affiliations of Jamshaid Sarwar Malik include National University of Sciences and Technology.
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Journal ArticleDOI
Maximising application of the aerosol box in protecting healthcare workers during the COVID-19 pandemic.
TL;DR: The Aerosol Box was intended to protect healthcare workers performing aerosol generating procedures (AGPs), specifically tracheal intubation, by providing a physical barrier to droplet and/or aerosol exposure.
Journal ArticleDOI
Gaussian Random Number Generation: A Survey on Hardware Architectures
TL;DR: This work has provided the method and theory, pros and cons, and a comparative summary of the speed, statistical accuracy, and hardware resource utilization of these architectures, and described two novel hardware GRNG architectures, namely, the CLT-inversion and the multihat algorithm, respectively.
Proceedings ArticleDOI
Generating high tail accuracy Gaussian Random Numbers in hardware using central limit theorem
TL;DR: It is shown that it is possible to achieve high tail accuracy by empirically computing the error in CLT, which can be compensated with a simple correction algorithm.
Proceedings ArticleDOI
An efficient hardware implementation of high quality AWGN generator using Box-Muller method
TL;DR: This work has performed extensive error analysis to show that coefficient memory for polynomial approximation can be reduced by more than 35 percent without compromising on quality of generated Gaussian samples.
Proceedings ArticleDOI
Unifying CORDIC and Box-Muller algorithms: An accurate and efficient Gaussian Random Number generator
TL;DR: An efficient hardware implementation of Gaussian Random Number (GRN) generator based upon Box-Muller (BM) and CORDIC algorithms is presented and a novel hardware architecture with flexible design space that unifies the two algorithms is illustrated.