J
Jean-Luc Danger
Researcher at Télécom ParisTech
Publications - 58
Citations - 1862
Jean-Luc Danger is an academic researcher from Télécom ParisTech. The author has contributed to research in topics: Side channel attack & Cryptography. The author has an hindex of 25, co-authored 58 publications receiving 1642 citations. Previous affiliations of Jean-Luc Danger include École Normale Supérieure & Institut Mines-Télécom.
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Proceedings ArticleDOI
RSM: a small and fast countermeasure for AES, secure against 1st and 2nd-order zero-offset SCAs
TL;DR: A new form of Boolean masking for the Advanced Encryption Standard (AES) called “RSM” is presented, which shows the same level in performances as the state-of-the-art, while being less area consuming, and secure against Variance-based Power Analysis (VPA) and second-order zero-offset CPA.
Proceedings ArticleDOI
Practical Setup Time Violation Attacks on AES
TL;DR: This paper proves that it is able to reproduce experimentally the random errors model used by G. Piret and J. Quisquater (2003) to realize practical fault attack on a smart card embedding an AES encryptor by under-powering it.
Proceedings ArticleDOI
Hardware Trojan Horses in Cryptographic IP Cores
TL;DR: In this article, the authors study hardware trojan horses insertion and detection in cryptographic IP blocks, based on the comparison between optical microscopic pictures of the silicon product and the original view from a GDSII layout database reader.
Journal ArticleDOI
High speed true random number generator based on open loop structures in FPGAs
TL;DR: The proposed architecture is very simple and generic as it is based on an open loop structure with no specific component such as pll, which allows higher bit rates while maintaining provable unconditional security.
Proceedings ArticleDOI
An Easy-to-Design PUF Based on a Single Oscillator: The Loop PUF
TL;DR: The proposed PUF implementation is a loop composed of N identical and controllable delay chains which are serially assembled in a loop to create a single ring oscillator which can be used to generate intrinsic device keys for cryptographic algorithms.