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Showing papers by "Jenö Dr. Tihanyi published in 1999"


Patent
Jenö Dr. Tihanyi1
15 Mar 1999
TL;DR: In this article, a lateral high-voltage sidewall transistor, where successively alternating semiconductor layers (4, 3) having a first and a second type of conductivity are provided on a slightly doped semiconductor substrate (1, 2), is considered.
Abstract: The invention relates to a lateral high-voltage sidewall transistor, wherein successively alternating semiconductor layers (4, 3) having a first and a second type of conductivity are provided on a slightly doped semiconductor substrate (1) having a second type of conductivity. A source area (10) having a first type of conductivity and a drain area (9) having a first type of conductivity extend through the semiconductor layers (4, 3) to the semiconductor substrate. The same applies to a gate (G) consisting of a gate trench fitted with a gate insulation layer (12) and filled with conductive material (14), which also extends through the semiconductor layers (4, 3) to the semiconductor body (1) and is located in the boundary area with the source area (10) in the direction of the drain area (9). At least a semiconductor area (11) having a second type of conductivity is provided on one side of the source area (10) and the gate trench, said area extending to the semiconductor substrate (1), below the source area (10) and partially below the gate trench.

23 citations


Patent
17 Dec 1999
TL;DR: In this paper, the junction gate field effect transistor (JGFPT) was introduced, which consists of a semiconductor zone comprising an inner area (13) as well as a first (22) and a second (32) connecting area.
Abstract: The invention relates to a junction-gate field-effect transistor comprising a semiconductor zone (10) which presents an inner area (13) as well as a first (22) and a second (32) connecting area. The first connecting area (22) is of the same conductivity type as the inner area (13) but has a higher doping concentration and the second connecting area (32) is of a conductivity type opposite to that of the inner area (13). This reduces forward resistance while maintaining a high blocking voltage strength.

1 citations


Patent
12 Feb 1999
TL;DR: In this paper, a field-effect-controllable power semiconductor component having a plurality of parallel geschaltenen and arranged in each case in cells discrete components is described.
Abstract: Die Erfindung betrifft ein durch Feldeffekt steuerbares Leistungs-Halbleiterbauelement, das eine Vielzahl von parallel geschaltenen und jeweils in Zellen angeordneten Einzelbauelementen aufweist, wobei die Zellen in einem Zellenfeld auf relativ kleinem Raum dicht gepackt angeordnet sind. The invention relates to a field-effect-controllable power semiconductor component having a plurality of parallel geschaltenen and arranged in each case in cells discrete components, wherein the cells are arranged tightly packed in a cell array in a relatively small space. Die parallel geschaltenen Source-Zonen der Zellen weisen Abschattungsbereiche auf, die jeweils in den Abschattungsbereiche enthaltenden Zellen das effektive W/L-Verhaltnis reduzieren. The parallel geschaltenen source regions of the cells have occulting regions, the cells in each of the occulting containing reduce the effective W / L ratio. Die Erfindung weist den Vorteil auf, das durch Vorsehen von Abschattungsbereichen innerhalb der Sourcezonen, die vorzugsweise undotiert sind bzw. zumindest sehr viel niedriger dotiert sind als die Sourcezonen, die kritischen Bereiche im Zellenfeld mit der hochsten Stromdichte gezielt entscharft werden und somit die Stromdichte in stromfuhrenden Filament der Zelle homogener verteilt wird. The invention has the advantage that the critical areas to be defused targeted in the cell array with the highest current density by providing Abschattungsbereichen within the source regions, which are preferably undoped or at least doped much lower than the source regions, and thus the current density in the current-carrying filament of the cell is more homogeneously distributed. Durch diese Masnahme last sich das Zellraster L der Zellen im Zellenfeld verringern bzw. der flachenbezogenen Durchlaswiderstand verringert werden, was gleicherzeitig zu einer Verringerung der Verlustleistung fuhrt. By this measure, the grid of cells L of the cells in the cell array can be reduced or the on-state resistance per unit area can be reduced, resulting in the same time to a reduction in power loss.

Patent
17 Dec 1999
TL;DR: In this paper, a transistor is used to compute a couche d'appauvrissement comprend une zone a semi-conducteurs (10) dotee d'une zone interne (13).
Abstract: Le transistor a effet de champ dote d'une couche d'appauvrissement comprend une zone a semi-conducteurs (10) dotee d'une zone interne (13). La zone a semi-conducteurs (10) contient egalement une premiere zone de connexion (22) et une deuxieme zone de connexion (32). La premiere zone de connexion (22) est du meme type de conductivite que la zone interne (13) mais a une concentration de dopage plus elevee. La deuxieme zone de connexion (22) est d'un type de conduction oppose a celui de la zone interne (13). On obtient ainsi une reduction de la resistance directe tout en conservant une resistance elevee a la tension de blocage.

Patent
17 Dec 1999
TL;DR: In this article, the junction gate field effect transistor (JGFPT) was introduced, which consists of a semiconductor zone comprising an inner area (13) as well as a first (22) and a second (32) connecting area.
Abstract: The invention relates to a junction-gate field-effect transistor comprising a semiconductor zone (10) which presents an inner area (13) as well as a first (22) and a second (32) connecting area. The first connecting area (22) is of the same conductivity type as the inner area (13) but has a higher doping concentration and the second connecting area (32) is of a conductivity type opposite to that of the inner area (13). This reduces forward resistance while maintaining a high blocking voltage strength.