The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry coupled to the array an array of memory cells via a sense line. The sensing circuitry is configured to sense, as a voltage associated with a second operand of a logical function, a voltage on the sense line corresponding to a first logical data value resulting in part from reading a first memory cell of the array of memory cells associated with a first operand of the logical function.

Performing logical operations using sensing circuitry

Global on-chip data communication is becoming a concern as the gap between transistor speed and interconnect bandwidth increases with CMOS process scaling. Repeaters can partly bridge this gap, but the classical repeater insertion approach requires a large number of repeaters while the intrinsic data capacity of each interconnect-segment is only partially used. In this paper we analyze interconnects and show how a combination of layout, termination and equalization techniques can significantly increase the data rate for a given length of uninterrupted interconnect. To validate these techniques, a bus-transceiver test chip in a 0.13-μm, 1.2-V, 6-M copper CMOS process has been designed. The chip uses 10-mm-long differential interconnects with wire widths and spacing of only 0.4 μm. Differential interconnects are insensitive to common-mode disturbances (e.g., non-neighbor crosstalk) and enable the use of twists to mitigate neighbor-to-neighbor crosstalk. With transceivers operating in conventional mode, the chip achieves only 0.55 Gb/s/ch. The achievable data rate increases to 3 Gb/s/ch (consuming 2 pJ/bit) with a pulse-width pre-emphasis technique, used in combination with resistive termination.

A 3-Gb/s/ch transceiver for 10-mm uninterrupted rc-limited global on-chip interconnects

Single-Electron Majority Logic Circuits

Due to the winding level of the thinned wafers and the surface roughness of silicon dies, the quality of through-silicon vias (TSVs) varies during the fabrication and bonding process. If one TSV exhibits a defect during its manufacturing process, the probability of multiple defects occurring in the TSVs neighboring the faulty TSV increases, i.e., the TSV defects tend to be clustered, which significantly reduces the yield of 3-D integrated circuit. To resolve the clustered TSV faults, router-based, ring-based, group-based, and cellular-based redundant TSV (RTSV) architectures were proposed. However, the repair rate is low and the hardware overhead as well as delay overhead is high. In this article, we propose a honeycomb-based RTSV architecture to utilize the area and delay more efficiently as well as to maintain high yield. The simulation results show that the proposed architecture has a 99.84% repair rate for uniform faults and an 81.42% repair rate for highly clustered faults. The proposed design achieves a 51.66% reduction of hardware overhead compared with the router-based design and a 20.69%, 46.93%, 34.17%, and 11.15% reduction of total delay compared with ring-based, router-based, group-based, and cellular-based methods, respectively.

LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults

Earth system science has changed rapidly due to global environmental changes and the advent of Earth observation technology. Therefore, new tools are required to monitor, measure, analyze, evaluate, and model Earth observation data. Google Earth (GE) was officially launched by Google in 2005 as a ”geobrowser”, and Google Earth Engine (GEE) was released in 2010 as a cloud computing platform with substantial computational capabilities. The use of these two tools or platforms in various applications, particularly as used by the remote sensing community, has developed rapidly. In this paper, we reviewed the applications and trends in the use of GE and GEE by analyzing peer-reviewed articles, dating up to January 2021, in the Web of Science (WoS) core collection using scientometric analysis (i.e., by using CiteSpace) and meta-analysis. We found the following: (1) the number of articles describing the use of GE or GEE increased substantially from two in 2006 to 530 in 2020. The number of GEE articles increased much faster than those concerned with the use of GE. (2) Both GE and GEE were extensively used by the remote sensing community as multidisciplinary tools. GE articles covered a broader range of research areas (e.g., biology, education, disease and health, economic, and information science) and appeared in a broader range of journals than those concerned with the use of GEE. (3) GE and GEE shared similar keywords (e.g., “land cover”, “water”, “model”, “vegetation”, and “forest”), which indicates that their application is of great importance in certain research areas. The main difference was that articles describing the use of GE emphasized its use as a visual display platform, while those concerned with GEE placed more emphasis on big data and time-series analysis. (4) Most applications of GE and GEE were undertaken in countries, such as the United States, China, and the United Kingdom. (5) GEE is an important tool for analysis, whereas GE is used as an auxiliary tool for visualization. Finally, in this paper, the merits and limitations of GE and GEE, and recommendations for further improvements, are summarized from an Earth system science perspective.

Progress and Trends in the Application of Google Earth and Google Earth Engine

Automatic ship detection in optical remote-sensing (ORS) images has wide applications in civil and military fields. Research on ship detection in ORS images started late compared to synthetic apert...

Ship detection based on fused features and rebuilt YOLOv3 networks in optical remote-sensing images

We propose a novel analog/digital (A/D) converter based on single-electron transistors (SETs) in this paper. In the proposed A/D converter, the core cell is a SET module, composed of capacitive dividers and SET-based universal literal gates. The SET-based universal literal gate is similar to the well-known Tucker's inverter (J.R. Tucker, J. Appl. Phys., vol. 72, no. 9, pp. 4399-4413, 1992), but here it acts as digital conversion and the inputs of upper-SET and lower-SET are two opposite voltages. In the SET-based universal literal gate, by adjusting the some parameters, the output having about 50% duty ratio of square-wave-like and zero-output for zero-input (in contrast, high-voltage output for zero-input in Tucker's inverter) is obtained, where we fully utilize the periodic oscillation of SETs on gate voltage (/spl I.bar/V/sub G/=e/C/sub G/). We demonstrate the basic function of a 4-bit SET-based A/D converter using the MOSES program developed by K.K. Likharev's group, which is based on the so-called orthodox theory and Monte Carlo method. The results may be easily extended to higher-bit A/D converters.

A single-electron-transistor-based analog/digital converter

This paper investigates the implementation of generic periodic symmetric functions (PSFs) with single-electron tunneling transistors (SETTs). The PSF implementation scheme we propose fully utilizes the SETT Coulomb oscillation effect and can properly operate at T>0K, and only a pair of complementary SETTs is required for the implementation of any PSF. Based on the novel PSF block, we propose an analog-to-digital converter (ADC) scheme that requires n PSFs for an n-bit ADC implementation. To demonstrate our approach, a 4-b ADC and a 7|3 counter were designed and verified at 10 K by means of simulation.

/pdf/single-electron-tunneling-transistor-implementation-of-4suelr8k16.pdf

Single-electron tunneling transistor implementation of periodic symmetric functions

A novel single-electron tunneling transistors (SETTs) based analog-to-digital converter (ADC) is proposed in this paper. The scheme we propose fully utilizes Coulomb oscillation effect, can properly operate at T>0 K, and only a capacitive divider (built with 2n-2 capacitors) and n pairs of complementary SETTs are required for an n-bit ADC implementation. When compared with other state-of-the-art SET based ADCs our method provides the most compact solution measured in terms of circuit elements and has a potential advantage in terms of conversion speed. To illustrate the operation of the proposed scheme, a 4-bit ADC is demonstrated at 10K by means of simulation.

/pdf/analog-to-digital-converter-based-on-single-electron-3z35lmk76d.pdf

Analog-to-digital converter based on single-electron tunneling transistors

Due to the winding level of the thinned wafers and the surface roughness of silicon dies, the quality of through-silicon vias (TSVs) varies during the fabrication and bonding process, which greatly reduces the yield of 3-D-ICs. The basic method to repair faulty TSVs (FTSVs) is to transfer the signals on FTSVs through regular TSVs. Many redundant TSV (RTSV) structures have been proposed to repair uniformly distributed FTSVs. For clustering FTSVs, a router-based RTSV structure appears to be a good scheme. But it is not an economical method, since the structure consumes many more hardware resources than normal structures. In this paper, we propose a cellular-based RTSV structure to utilize hardware resources more efficiently for a higher yield. We propose a corresponding algorithm for recovery-route searching. Simulation results show that for 1E6 TSVs and a TSV failure rate of 0.01%, our design consumes only 4.5% more area of all STSVs to achieve a yield above 99.9%. We compare our structure with several other designs and demonstrate the cost-effectiveness of the proposed technique.

Jianfei Jiang

Papers

Ship detection based on fused features and rebuilt YOLOv3 networks in optical remote-sensing images

A single-electron-transistor-based analog/digital converter

Single-electron tunneling transistor implementation of periodic symmetric functions

Analog-to-digital converter based on single-electron tunneling transistors

A New Cellular-Based Redundant TSV Structure for Clustered Faults