This work presents a Butler matrix based four-directional switched beamforming antenna system realized in a two-layer hybrid stackup substrate for 28-GHz mm-Wave 5G wireless applications. The hybrid stackup substrate is composed of two layers with different electrical and thermal properties. It is formed by attaching two layers by using prepreg, in which the circuit components are placed in both outer planes and the ground layers are placed in the middle. The upper layer that is used as antenna substrate has er = 2.17, tanδ = 0.0009 and h = 0.254 mm. The lower layer that is used as a Butler matrix substrate has er = 6.15, tanδ = 0.0028 and h = 0.254 mm. By realizing the antenna array on the lower-er layer while the Butler matrix on the higher-er layer, the Butler matrix dimension is significantly reduced without sacrificing the array antenna performance, leading to significant overall antenna system size reduction. The two-layer substrate approach also significantly suppresses parasitic radiation leaking from the Butler matrix toward the antenna side, allowing overall radiation pattern improvement. The fabricated beamforming antenna is composed of 1 × 4 patch antenna array and a 4 × 4 Butler matrix. The measured return loss is lower than −8 dB at all ports in 28-GHz. It demonstrates the switched beam steering toward four distinct angles of—16°, +36°, −39°, and +7°, with the sidelobe levels of −12, −11.7, −6, and −13.8 dB, respectively. Antenna gain is found to be about 10 dBi. Due to the two-layer hybrid stackup substrate, the total antenna system is realized only in 1.7λ × 2.1λ, which shows the smallest form factor compared to similar other works.

https://www.mdpi.com/2079-9292/8/11/1232/pdf

A Miniaturized Butler Matrix Based Switched Beamforming Antenna System in a Two-Layer Hybrid Stackup Substrate for 5G Applications

Accurate PCB transmission-line characterization can be challenging due to the effect of test fixtures and launching vias, etc. In this paper, VNA measurements with innovative de-embedding approaches, including those that utilize only one “2X-Thru” calibration standard are studied. The 2X-Thru de-embedding method is first shown to be correlated to existing TRL calibration method. Test boards built with varying lengths of transmission lines routed on different layers were then characterized with the new de-embedding method. Excellent de-embedded results are achieved for frequencies up to 30 GHz.

Accurate characterization of PCB transmission lines for high speed interconnect

Far-end crosstalk (FEXT) noise is one of the major issues that limits signal integrity performance for high-speed digital products. It is important to estimate the crosstalk noise accurately to avoid noise margin failure or overdesigned transmission lines. Traditionally, analytical formulas for crosstalk noise are based on lossless and perfect impedance match assumptions, which provide limited guidance for a practical high-speed transmission line design. A phenomenon is observed that a lossy conductor increases the FEXT on coupled striplines. To provide a reasonable explanation, analytical and numerical investigations were performed using a modal analysis based approach. A new FEXT component due to the lossy conductor is proposed. Such FEXT component is important to a high-speed stripline design because it is a major contributor when all terminals are matched. To estimate the impact of loss on FEXT, a practical and fast estimation approach is proposed.

Comprehensive and Practical Way to Look at Far-End Crosstalk for Transmission Lines With Lossy Conductor and Dielectric

Dual-stripline is gaining popularity in computer designs to save printed circuit board (PCB) cost and achieve more compact form factor. A key concern in dual-stripline design is the inter-layer crosstalk (ILC). In this paper, differential dual-stripline crosstalk is investigated, and a complete design strategy is provided. In addition to the conventional crosstalk mitigation techniques, an innovative wiring technique is proposed to reduce ILC for parallel dual-striplines. The proposed routing strategy can effectively mitigate the impact of ILC, and, as a result, enable high-density PCB layout, achieve compact form factor, and save the bill of material (BOM) cost.

Inter-layer crosstalk management in differential dual-striplines

Microstrip copper lines play an important role in high-speed printed circuit boards. It is necessary to perform appropriate surface finishing on the microstrip copper lines to avoid oxidation and reduce the loss of signal transmission. In this work, the microstrip copper lines after micro etching treatment were finished with immersion silver, immersion tin and electroless nickel immersion gold (ENIG), respectively. Surface microstructures, 3D features and surface contact angle were examined to find the effect of the copper finishing on signal transmission loss. The results indicated that the microstrip copper lines with micro-etching treatment exhibits low signal transmission loss as − 39.9 dB/m at 20 GHz. The tested microstrip copper lines showed that signal transmission loss follows an increasing trend successively with micro etching treatment, immersion silver treatment, immersion tin treatment and ENIG treatment.

Effect of surface finishing on signal transmission loss of microstrip copper lines for high-speed PCB

The via effect has a big impact to the loss of the entire channel. To characterize the loss of a stripline design without the via contribution is very important for a designer to evaluate the dielectric material selection and the manufacturing process control. In this paper, an effective methodology, namely Delta-L, was proposed to remove the via effect efficiently and characterize the board electrical performance accurately.

Delta-L methodology for efficient PCB trace loss characterization

The board-level signal integrity, a new methodology to indicate the performance quality of a PCB channel, is introduced in this paper. Instead of the eye height and the eye width, the pseudo eye and amplitude ratio are defined as performance indicators of a PCB channel. The two applications of board-level signal integrity methodology are also given.

Board-level signal integrity methodology

Microstrip design in printed circuit board (PCB) suffers potential high insertion loss or higher crosstalk, compared to stripline. The loss of microstrip has been a key limiting factor for high speed application. In this paper, a new type of solder mask material with low dissipation factor (DF) is proposed to apply in the microstrip design, instead of the regular solder mask. The proposed approach by using low loss solder mask can improve the microstrip signal integrity more than 10%. Designers can use the outer layers with the lower loss to have more design flexibility.

Microstrip signal integrity enhancement by using low-loss solder mask

FR4 is a commonly used material in industry to build printed circuit boards. However signals propagating in this media have significant attenuation when date rate gets higher and higher, gating the solution space. Low loss materials can be considered to enable longer board routing but they are very costly for most of commercial platforms. In this paper, hybrid PCB stackup is investigated. The investigation focuses on full channel signal integrity analysis. Simulations for SATA3 and PCIE3 show noticeable improvement of using this hybrid stackup. Such a hybrid is normally less costly than all low loss PCB stackup, thus achieving a good compromising between cost and performance for PCB design and manufacturing.

Jimmy Hsu

Papers

Delta-L methodology for efficient PCB trace loss characterization

Inter-layer crosstalk management in differential dual-striplines

Board-level signal integrity methodology

Microstrip signal integrity enhancement by using low-loss solder mask

Improve signal integrity performance by using hybrid PCB stackup