Driving solutions for power semiconductor devices are experiencing new challenges since the emerging wide bandgap power devices, such as silicon carbide (SiC), with superior performance become commercially available. Generally, high switching speed is desired due to the lower switching loss, yet high $dv/dt$ and $di/dt$ can result in elevated electromagnetic interference (EMI) emission, false-triggering, and other detrimental effects during switching transients. Active gate drivers (AGDs) have been proposed to balance the switching losses and the switching speed of each switching transient. The review of the in-existence AGD methodologies for SiC devices has not been reported yet. This review starts with the essence of the slew rate control and its significance. Then, a comprehensive review categorizing the state-of-the-art AGD methodologies is presented. It is followed by a summary of the AGDs control and timing strategies. In this work, using AGD to reduce the EMI noise of a 10-kV SiC MOSFET system is reported. This work also highlights other capabilities of AGDs, including reliability enhancement of power devices and rebalancing the mismatched electrical parameters of parallel- and series-connected devices. These application scenarios of AGDs are validated via simulation and experimental results.

A Review of Switching Slew Rate Control for Silicon Carbide Devices Using Active Gate Drivers

Latest wide-bandgap power devices are switching progressively faster compared with existing silicon devices. Their accurate current measurements for either control or protection have therefore become tougher. One method that can fulfill the requirements is to use a Rogowski coil and its accompanied electronics to form a Rogowski current sensor with high bandwidth, small volume, low cost, and ease of integration. This article therefore aims to review various aspects of the Rogowski current sensor from its history, measuring principles to modern power-electronic applications. The applications have, in turn, motivated a progression from traditional helical to recent miniaturized printed circuit board implementation, in order to improve the overall power density. This progression has similarly been reviewed, together with its various design aspects applied to the winding, integrator, shielding, and parameters of the Rogowski current sensor. Future challenges and directions are then summarized, whose ultimate goal is to maximize accuracy over a wide bandwidth without being affected by radiated and near-field-coupling interferences.

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A Review of Traditional Helical to Recent Miniaturized Printed Circuit Board Rogowski Coils for Power-Electronic Applications

Conventional insulated gate bipolar transistor (IGBT) current sensing and protection techniques usually employ discrete sensors, such as lossy shunt resistors, and may involve accessing the high-voltage collector load of the IGBT. This would normally present difficulties for integration. This paper presents an IGBT gate driver IC with a collector current sensing circuit and an on-chip CPU for local data processing. This IC is prototyped using a TSMC 0.18 μm 40 V BCD Gen-2 process. The collector current sensing technique is based on the unique Miller plateau relationship between the gate current and collector current ( $I_{C}$ and $I_{G}$ ) for a particular gate resistance ( $R_{G}$ ). It allows a cycle-by-cycle measurement of IC during both turn- on and turn- off transients without any extra discrete components. The temperature variation is compensated internally by the on-chip CPU using polynomial curve fitting. This technique only monitors the low-voltage signal at the gate terminal, without the need to handle any high-voltage signal on the collector/load side. Measurements using a double pulse test setup show an accuracy of ±0.5 A over the current ranges of 1–30 A for turn- on and 1–50 A for turn- off from 25 to 75 °C.

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A Smart IGBT Gate Driver IC With Temperature Compensated Collector Current Sensing

A gate driving for power devices is a key technology to further improve switching characteristics. With the help of digital gate driver IC, the switching behavior of power devices can be enhanced even under high-speed switching. In this paper, an evaluation platform for determining the optimal switching pattern of an active gate drive control is proposed for an inverter circuit. A high speed optimization system is built up to search for an advantageous switching pattern that reduces total switching loss of two power devices in an inverter circuit and constrains surge voltage simultaneously. The proposed online optimization demonstrates its feasibility for the full-bridge inverter circuit, which is rated at 500 V with digital active gate drive control. Experimental results show that the proposed optimization system is able to obtain optimal switching pattern from $64^{60}$ possible combinations of switching patterns within 15 min, which is 6 times faster than the previous study. Optimizations can also conducted under different load current conditions. Eventually, the obtained optimal pattern yields up to 42% reduction in the total switching loss when it constrains surge voltage to minimum compared with the conventional driving pattern.

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Optimization Platform to Find a Switching Pattern of Digital Active Gate Drive for Reducing Both Switching Loss and Surge Voltage

A wide-bandwidth galvanically isolated current sensor in a 180 nm CMOS technology is presented. It combines two sensing principles for the contactless and lossless current measurement in power electronic applications. A dedicated vertical Hall sensor (low frequencies) and an integrated helix-shaped Rogowski coil (high frequencies) enable to measure currents in any power line under the chip from DC up to 15.3 MHz, which exceeds prior art by 5x. Both sensing concepts are fully integrated on one microchip without the need for any kind of magnetics or post-processing. The wide bandwidth results in fast transient properties, verified by an IGBT double pulse measurement of current pulses with an amplitude of 60 A and slew rates up to 1 kA/μs. A sensitivity of 3.1 mV/A is achieved.

An Integrated and Galvanically Isolated DC-to-15.3 MHz Hybrid Current Sensor

Modern power transistors are able to switch at very high transition speed, which can cause EMC violations and overshoot. This is addressed by a gate driver with variable gate current, which is able to control the transition speed. The key idea is that the gate driver can influence the di/dt and dv/dt transition separately and optimize whichever transition promises the highest improvement while keeping switching losses low. To account for changes in the load current, supply voltage, etc., a control loop is required in the driver to ensure optimized switching. In this paper, a efficient control scheme for an automotive gate driver with variable output current capability is presented. The effectiveness of the control loop is demonstrated for a MOSFET bridge consisting of OptiMOS-T2™devices with a total gate charge of 39nC. This bridge setup shows dv/dt transitions between 50 to 1000ns, depending on driving current. The driver is able to switch between gate current levels of 1 to 500mA in 10/15ns (rising/falling transition). With the implemented control loop the driver is measured to significantly reduce the ringing and thereby reduce device stress and electromagnetic emissions while keeping switching losses 52% lower than with a constant current driver.

10ns Variable current gate driver with control loop for optimized gate current timing and level control for in-transition slope shaping

In a digitally controlled slope shaping system, reliable detection of both voltage and current slope is required to enable a closed-loop control for various power switches independent of system parameters In most state-of-the-art works, this is realized by monitoring the absolute voltage and current values Better accuracy at lower DC power loss is achieved by sensing techniques for a reliable passive detection, which is achieved through avoiding DC paths from the high voltage network into the sensing network Using a high-speed analog-to-digital converter, the whole waveform of the transient derivative can be stored digitally and prepared for a predictive cycle-by-cycle regulation, without requiring high-precision digital differentiation algorithms To gain an accurate representation of the voltage and current derivative waveforms, system parasitics are investigated and classified in three sections: (1) component parasitics, which are identified by s-parameter measurements and extraction of equivalent circuit models, (2) PCB design issues related to the sensing circuit, and (3) interconnections between adjacent boards The contribution of this paper is an optimized sensing network on the basis of the experimental study supporting fast transition slopes up to 100 V/ns and 1 A/ns and beyond, making the sensing technique attractive for slope shaping of fast switching devices like modern generation IGBTs, CoolMOSTM and SiC mosfets Measurements of the optimized dv/dt and di/dt setups are demonstrated for a hard switched IGBT power stage

Optimized dv/dt, di/dt sensing for a digitally controlled slope shaping gate driver

A concept for a slope shaping gate driver IC is proposed, used to establish control over the slew rates of current and voltage during the turn-on and turn-off switching transients. It combines the high speed and linearity of a fully-integrated closed-loop analog gate driver, which is able to perform real-time regulation, with the advantages of digital control, like flexibility and parameter independency, operating in a predictive cycle-by-cycle regulation. In this work, the analog gate drive integrated circuit is partitioned into functional blocks and modeled in the small-signal domain, which also includes the non-linearity of parameters. An analytical stability analysis has been performed in order to ensure full functionality of the system controlling a modern generation IGBT and a superjunction MOSFET. Major parameters of influence, such as gate resistor and summing node capacitance, are investigated to achieve stable control. The large-signal behavior, investigated by simulations of a transistor level design, verifies the correct operation of the circuit. Hence, the gate driver can be designed for robust operation.

Johannes Groeger

Papers

An Integrated and Galvanically Isolated DC-to-15.3 MHz Hybrid Current Sensor

10ns Variable current gate driver with control loop for optimized gate current timing and level control for in-transition slope shaping

Optimized dv/dt, di/dt sensing for a digitally controlled slope shaping gate driver

Dynamic stability of a closed-loop gate driver enabling digitally controlled slope shaping