Machine learning (ML) is widely used for building data-driven models that are highly useful for optimization. In this study, a finite element model-based adaptive ML method is presented for chip package reliability prediction and design optimization. This ML method employs a validated multi-scale finite element model for training data generation. An adaptive sampling scheme is developed to optimize the training process with a steepest descent algorithm. The developed method was used to optimize ultra low-k chip package design. The effects of ten key design parameters on chip packaging reliability were considered. Multiple ML algorithms were evaluated for model development. It is shown that the adaptive sampling method performs much better than existing sequential sampling methods and that the finite element-based ML model can be used to achieve improved prediction accuracy for chip package design optimization.

An Adaptive Machine Learning Method Based on Finite Element Analysis for Ultra Low-k Chip Package Design

In this paper, drop reliability of various PBA (printed board assembly) mounting structures is investigated and compared. Then, we built SAC305 (Sn3.0Ag0.5Cu) interconnects for BGA (ball grid array) package failure model to evaluate the drop impact reliability of handheld devices. In order to simulate actual behavior of the solder joint under the drop impact load of handheld devices, we perform explicit full FEA (finite element analysis) modeling. However, this takes a lot of computing time because of the large aspect ratio of element size between solder joints and other structures such as PCB (printed circuit board) and electronic packages. Therefore, an effective way to represent solder interconnects for FEA is needed which would be relatively simpler yet detailed. Comparable board-level drop tests are conducted after equipping test vehicles with various fixtures considering PBA mounting structures, which make it possible to apply different loading conditions to BGA packages. The results show different drop impact life for solder interconnects depending on the mounting design of the PBA. Particularly, the solder interconnect of the component located at the middle of the PCB exhibits the shortest impact life where the highest tensile stress occurs. Also, the mounting design restraining PBA deflections shows better reliability under the drop impact loading. Sequentially, simulating with a PBA composed of the BGA package and the PCB is considered to assess the feasibility of the solder ball failure modeling when the drop impact load is applied. Especially, for the modeling of the solder balls, detailed solid model and simple beam model are compared regarding computational efficiency and numerical accuracy. We found that the simple beam model significantly shortens computational time from 110 h to less than an hour. Accordingly, the feasibility of the beam model for the solder balls is shown by correlating the stress level and the drop impact life obtained from the experiments.

Comparative Study on Reliability and Advanced Numerical Analysis of BGA Subjected to Product-Level Drop Impact Test for Portable Electronics

Microstructure and mechanical properties of Sn–Bi solder joints reinforced with Zn@Sn core–shell particles

As an important factor affecting the reliability of integrated circuits (IC), warpage has attracted more and more attention. This article uses a combination of theoretical analysis and experimental verification. First, finite element method is used to analyze the impact of IC packaging materials on product warpage, and secondly, the simulation results are verified through experiments. The research results show that for smiling face products, reducing the Coefficient of Thermal Expansion (CTE) of the Epoxy Molding Compound (EMC) and increasing the CTE of the Core can effectively reduce product warpage. At the same time, reducing the thickness of the Core and increasing the thickness of the soldermask (SM) are also conducive to reducing warpage; for crying face products, the opposite is true. The above research results provide a theoretical basis for reducing product warpage in IC packaging.

The Influence and Optimization of Design Parameters on Integrated Circuits Package Warpage

As a vital component of electronic products, the quality of the printed circuit board (PCB) assembly directly affects the applications and service life. During the reflow soldering process, the PCB assembly may suffer excessive warpage. Therefore, in order to avoid such a failure, this paper conducts the finite element simulation of the PCB assembly temperature change and the deformation process according to a theoretical model for heat transfer and then explores the causes of warpage and predicts the percentage of warpage that occurs during the reflow soldering. A reliability sensitivity analysis is creatively applied in the PCB assembly warpage study in order to uncover the quantitative influence of multiple factors with random errors on warpage. Moreover, the reliability calculation provides a theoretical basis for the allowable error range of geometric dimensions, material properties and process parameters of the PCB assembly. This research has a remarkable significance and is valuable to engineering in promoting quality and reliability, and increasing the yield of PCB assembly in mass production.

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Reliability Sensibility Analysis of the PCB Assembly concerning Warpage during the Reflow Soldering Process

Plastic ball grid array (PBGA) is one of the most widely used types of chip packages in various electronic devices such as network servers, microcontrollers, and memory devices. As the demand for higher performance electronic devices grows, the I/O densities of PBGA packages are increasing while requiring superior reliability. Warpage induced during the reflow assembly process is one of the crucial factors affecting the thermo-mechanical reliability of PBGA packages; therefore, accurate warpage prediction is an important task for package design processes. In this study, the effects of four geometric factors (the solder bump pitch, package size, molding compound, and substrate thicknesses) of the PBGA package on its warpage are assessed by using parametric finite element analysis. The correlation between PBGA warpage and the four factors is studied using the analysis of variance and the regression method. These results are expected to provide design guidelines for in-house PBGA designers.

Parametric study of warpage in PBGA packages

In optical metrology, fringe projection and moire techniques have been widely used to measure the topography of objects. We can combine the advantages of the two techniques by applying a configuration of simultaneous dual projection in the fringe projection technique, which generates a superimposed fringe pattern containing a moire pattern that is phase modulated according to the topography. In this work, we present an analytic and comparative study of three methods to demodulate the phase of the moire pattern: the spatial, spatial-temporal, and temporal methods. Those methods consist of two steps: first, the moire pattern is extracted from the superimposed fringe pattern; next, the phase of the moire pattern is demodulated. The analytical results show that the resulting phase map has double phase sensitivity compared to that of the classical fringe projection technique. Experimental and numeric results prove the feasibility of this technique.

John S. Kang

Papers

Parametric study of warpage in PBGA packages

Moire profilometry through simultaneous dual fringe projection for accurate phase demodulation: a comparative study